PIC18F4420-I/P Microchip Technology, PIC18F4420-I/P Datasheet - Page 27

IC MCU FLASH 8KX16 40DIP

PIC18F4420-I/P

Manufacturer Part Number
PIC18F4420-I/P
Description
IC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4420-I/P

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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FIGURE 4-4:
4.5
A data EEPROM address may be read via a sequence
of core instructions (4-bit command, ‘0000’) and then
output on PGD via the 4-bit command, ‘0010’ (TABLAT
register). The result may then be immediately
compared to the appropriate data in the programmer’s
memory for verification. Refer to
Data EEPROM Memory”
reading data EEPROM.
4.6
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory, data EEPROM, ID locations
and Configuration bits. The Device ID registers
(3FFFFEh:3FFFFFh) should be ignored.
A “blank” or “erased” memory cell will read as ‘1’. There-
fore, Blank Checking a device merely means to verify
that all bytes read as FFh, except the Configuration bits.
Unused (reserved) Configuration bits will read ‘0’ (pro-
grammed). Refer to
expect data for the various PIC18F2XXX/4XXX family
devices.
 2010 Microchip Technology Inc.
PGC
PGD
Verify Data EEPROM
Blank Check
1
0
2
1
3
0
Figure 4-5
SHIFT OUT DATA HOLDING REGISTER TIMING (0010)
4
0
for implementation details of
P5
PGD = Input
1
for blank configuration
2
Section 4.4 “Read
3
4
5
PIC18F2XXX/4XXX FAMILY
6
7
8
P6
9
Given that Blank Checking is merely code and data
EEPROM verification with FFh expect data, refer to
Section 4.4 “Read Data EEPROM Memory”
Section 4.2 “Verify Code Memory and ID Locations”
for implementation details.
FIGURE 4-5:
LSb
P14
10
1
11
2
PGD = Output
Blank Check Device
12
Shift Data Out
3
13
device
4
blank?
Abort
Start
Is
14
5
No
15
6
BLANK CHECK FLOW
16
MSb
P5A
Yes
Fetch Next 4-Bit Command
1
n
PGD = Input
2
Continue
DS39622L-page 27
n
3
n
4
n
and

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