PIC18F8310-I/PT Microchip Technology, PIC18F8310-I/PT Datasheet - Page 373

• Manufacturer Part Number: PIC18F8310-I/PT
• Description: IC PIC MCU FLASH 4KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8310-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 25 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 27-8:
TABLE 27-10: PROGRAM MEMORY READ TIMING REQUIREMENTS
 2010 Microchip Technology Inc.
Param.
150
151
155
160
161
162
163
164
165
166
167
168
169
171
171A
AD<19:16>
No
AD<15:0>
OSC1
BA0
ALE
TadV2alL
TalL2adl
TalL2oeL
TadZ2oeL
ToeH2adD OE  to AD Driven
TadV2oeH LS Data Valid before OE (data setup time)
ToeH2adl
TalH2alL
ToeL2oeH OE Pulse Width
TalH2alH
Tacc
Toe
TalL2oeH
TalH2csL
TubL2oeH AD Valid to Chip Enable Active
CE
OE
Symbol
Address Out Valid to ALE (address
setup time)
ALE  to Address Out Invalid (address hold
time)
ALE to OE 
AD high-Z to OE (bus release to OE)
OE  to Data In Invalid (data hold time)
ALE Pulse Width
ALE  to ALE  (cycle time)
Address Valid to Data Valid
OE  to Data Valid
ALE to OE 
Chip Enable Active to ALE 
PROGRAM MEMORY READ TIMING DIAGRAM
Q1
164
Address
150
Characteristics
151
171
171A
Q2
PIC18F6310/6410/8310/8410
167
155
160
Q3
Address
166
168
169
0.625 T
0.25 T
0.125 T
0.75 T
0.25 T
0.5 T
165
Data from External
Min
Q4
10
20
—
—
—
CY
5
0
0
CY
CY
CY
CY
162
CY
163
– 10
– 5
– 25
– 20
– 10
– 5
0.125 T
0.25 T
0.5 T
Typ
T
161
—
—
—
—
—
—
—
—
—
—
—
CY
Q1
CY
CY
CY
0.625 T
0.5 T
DS39635C-page 373
Max
CY
10
—
—
—
—
—
—
—
—
—
—
—
—
Address
Address
CY
– 25
+ 10
Q2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns