PIC18F2331-I/SO Microchip Technology, PIC18F2331-I/SO Datasheet - Page 34
![IC PIC MCU FLASH 4KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F2331-I/SO
Manufacturer Part Number
PIC18F2331-I/SO
Description
IC PIC MCU FLASH 4KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18F2331-I/SO
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2331-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18F4331-EP PDF datasheet #7
- Current page: 34 of 392
- Download datasheet (4Mb)
oscillator. See
PIC18F2331/2431/4331/4431
3.7
Like previous PIC18 devices, the PIC18F2331/2431/
4331/4431 devices include a feature that allows the sys-
tem clock source to be switched from the main oscillator
to an alternate low-frequency clock source. PIC18F2331/
2431/4331/4431 devices offer two alternate clock
sources. When enabled, these give additional options for
switching to the various power-managed operating
modes.
Essentially, there are three clock sources for these
devices:
• Primary oscillators
• Secondary oscillators
• Internal oscillator block
The primary oscillators include the External Crystal
and Resonator modes, the External RC modes, the
External Clock modes and the internal oscillator block.
The particular mode is defined on POR by the contents
of Configuration Register 1H. The details of these
modes are covered earlier in this chapter.
The secondary oscillators are those external sources
not connected to the OSC1 or OSC2 pins. These
sources may continue to operate even after the
controller is placed in a power-managed mode.
PIC18F2331/2431/4331/4431 devices offer only the
Timer1 oscillator as a secondary oscillator. This
oscillator, in all power-managed modes, is often the
time base for functions such as a Real-Time Clock
(RTC).
Most often, a 32.768 kHz watch crystal is connected
between the RC0/T1OSO/T1CKI and RC1/T1OSI/
CCP2/FLTA pins. Like the LP Oscillator mode circuit,
loading capacitors are also connected from each pin to
ground.
The Timer1 oscillator is discussed in greater detail in
Section 13.2 “Timer1
In addition to being a primary clock source, the internal
oscillator block is available as a power-managed
mode clock source. The INTRC source is also used as
the clock source for several special features, such as
the WDT and Fail-Safe Clock Monitor.
The clock sources for the PIC18F2331/2431/4331/4431
devices are shown in
“Timer1 Module”
Configuration register details.
DS39616D-page 34
Clock Sources and Oscillator
Switching
Section 23.1 “Configuration Bits”
for further details of the Timer1
Oscillator”.
Figure
3-8. See
Section 13.0
for
Primary Clock modes. The IOFS bit indicates when the
providing the system clock in Secondary Clock modes. In
3.7.1
The OSCCON register
eral aspects of the system clock’s operation, both in
full-power operation and in power-managed modes.
The System Clock Select bits, SCS<1:0>, select the
clock source that is used when the device is operating
in power-managed modes. The available clock sources
are the primary clock (defined in Configuration Register
1H), the secondary clock (Timer1 oscillator) and the
internal oscillator block. The clock selection has no
effect until a SLEEP instruction is executed and the
device enters a power-managed mode of operation.
The SCS bits are cleared on all forms of Reset.
The Internal Oscillator Select bits, IRCF<2:0>, select
the frequency output of the internal oscillator block that
is used to drive the system clock. The choices are the
INTRC source, the INTOSC source (8 MHz) or one of
the six frequencies derived from the INTOSC post-
scaler (125 kHz to 4 MHz). If the internal oscillator
block is supplying the system clock, changing the
states of these bits will have an immediate change on
the internal oscillator’s output. On device Resets, the
default output frequency of the internal oscillator block
is set at 32 kHz.
The OSTS, IOFS and T1RUN bits indicate which clock
source is currently providing the system clock. The OSTS
indicates that the Oscillator Start-up Timer has timed out,
and the primary clock is providing the system clock in
internal oscillator block has stabilized, and is providing
the system clock in RC Clock modes. The T1RUN bit
(T1CON<6>) indicates when the Timer1 oscillator is
power-managed modes, only one of these three bits will
be set at any time. If none of these bits are set, the INTRC
is providing the system clock, or the internal oscillator
block has just started and is not yet stable.
The IDLEN bit controls the selective shutdown of the
controller’s CPU in power-managed modes. The use of
these bits is discussed in more detail in
“Power-Managed Modes”
Note 1: The Timer1 oscillator must be enabled to
2: It is recommended that the Timer1
OSCILLATOR CONTROL REGISTER
select the secondary clock source. The
Timer1 oscillator is enabled by setting the
T1OSCEN bit in the Timer1 Control
register (T1CON<3>). If the Timer1
oscillator is not enabled, then any
attempt to select a secondary clock
source,
instruction, will be ignored.
oscillator be operating and stable before
executing the SLEEP instruction, or a
very long delay may occur while the
Timer1 oscillator starts.
when
2010 Microchip Technology Inc.
(Register
executing
3-2) controls sev-
Section 4.0
a
SLEEP
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