PIC16F84A-20I/P Microchip Technology, PIC16F84A-20I/P Datasheet - Page 269

• Manufacturer Part Number: PIC16F84A-20I/P
• Description: IC MCU FLASH 1KX14 EE 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F84A-20I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Eeprom Size: 64 x 8
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 68 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 64 B
• Height: 3.3 mm
• Length: 22.86 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB16F84A - BOARD DAUGHTER ICEPIC3DVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.4.1.2
SDA
SCL
SSPIF
1997 Microchip Technology Inc.
BF (SSPSTAT<0>)
SSPOV (SSPCON<6>)
S
Reception
A7 A6 A5 A4 A3 A2 A1
1
2
Receiving Address
3
When the R/W bit of the address byte is clear and an address match occurs, the R/W bit of the
SSPSTAT register is cleared. The received address is loaded into the SSPBUF register.
When the address byte overflow condition exists, then no acknowledge (ACK) pulse is given. An
overflow condition is defined as either the BF bit (SSPSTAT<0>) is set or the SSPOV bit
(SSPCON<6>) is set.
An SSP interrupt is generated for each data transfer byte. The SSPIF flag bit must be cleared in
software, and the SSPSTAT register is used to determine the status of the byte.
Figure 16-8:
4
5
6
7
R/W=0
8
I
2
C Waveforms for Reception (7-bit Address)
ACK
9
D7
1
D6
2
SSPBUF register is read
Cleared in software
Receiving Data
D5
3
D4
Bit SSPOV is set because the SSPBUF register is still full.
4
D3
5
D2
6
D1
7
D0
8
ACK
Section 16. BSSP
9
D7
1
D6
2
D5
Receiving Data
3
D4
4
ACK is not sent.
D3
5
D2
6
D1
7
DS31016A-page 16-19
D0
8
ACK
9
transfer
Bus Master
terminates
P
16