PIC24FJ128GA008-I/PT Microchip Technology, PIC24FJ128GA008-I/PT Datasheet - Page 27

• Manufacturer Part Number: PIC24FJ128GA008-I/PT
• Description: IC PIC MCU FLASH 128K 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA008-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (43K x 24)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011, DV164033, MA240011, AC164127
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 69
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.0
As Harvard architecture devices, PIC24 micro-
controllers feature separate program and data memory
spaces and busses. This architecture also allows the
direct access of program memory from the data space
during code execution.
3.1
The
PIC24FJ128GA family devices is 4M instructions. The
space is addressable by a 24-bit value derived from
FIGURE 3-1:
© 2006 Microchip Technology Inc.
program
Note:
MEMORY ORGANIZATION
Program Address Space
Alternate Vector Table
Interrupt Vector Table
Device Configuration
Memory areas are not shown to scale.
Flash Config Words
address
Program Memory
(22K instructions)
PIC24FJ64GA
GOTO Instruction
Unimplemented
Reset Address
User Flash
(Read ‘0’s)
Registers
Reserved
DEVID (2)
PROGRAM SPACE MEMORY MAP FOR PIC24FJ128GA FAMILY DEVICES
Reserved
Reserved
memory
space
Alternate Vector Table
Interrupt Vector Table
Device Configuration
Flash Config Words
Program Memory
(32K instructions)
Preliminary
PIC24FJ96GA
GOTO Instruction
Unimplemented
Reset Address
of
User Flash
DEVID (2)
(Read ‘0’s)
Reserved
Registers
Reserved
Reserved
PIC24FJ128GA FAMILY
either the 23-bit Program Counter (PC) during program
execution, or from table operation or data space
remapping, as described in Section 3.3 “Interfacing
Program and Data Memory Spaces”.
User access to the program memory space is restricted
to the lower half of the address range (000000h to
7FFFFFh). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to
the Configuration bits and Device ID sections of the
configuration memory space.
Memory maps for the PIC24FJ128GA family of devices
are shown in Figure 3-1.
Alternate Vector Table
Interrupt Vector Table
Device Configuration
Flash Config Words
PIC24FJ128GA
Program Memory
(44K instructions)
GOTO Instruction
Unimplemented
Reset Address
User Flash
Reserved
(Read ‘0’s)
DEVID (2)
Reserved
Registers
Reserved
DS39747C-page 25
000000h
000002h
000004h
0000FEh
000100h
000104h
0001FEh
000200h
00ABFEh
00AC00h
00FFFEh
010000h
0157FEh
015800h
7FFFFEh
800000h
F7FFFEh
F80000h
F8000Eh
F80010h
FEFFFEh
FF0000h
FFFFFEh