PIC32MX420F032H-40I/MR Microchip Technology, PIC32MX420F032H-40I/MR Datasheet - Page 11
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PIC32MX420F032H-40I/MR
Manufacturer Part Number
PIC32MX420F032H-40I/MR
Description
IC PIC MCU FLASH 32KX32 64-QFN
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.MA320002.pdf
(208 pages)
2.DM320001.pdf
(44 pages)
3.PIC32MX320F032H-40IPT.pdf
(48 pages)
4.PIC32MX320F032H-40IPT.pdf
(66 pages)
5.PIC32MX320F032H-40IPT.pdf
(22 pages)
6.PIC32MX320F064H-40IMR.pdf
(172 pages)
Specifications of PIC32MX420F032H-40I/MR
Core Size
32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
MIPS32® M4K™
Speed
40MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC32
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI, USB
No. Of Pwm Channels
5
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, JTAG, SPI, TWI, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
6.2
Format:
Purpose:
Description (in sequence):
FIGURE 6-3:
FIGURE 6-4:
© 2010 Microchip Technology Inc.
PGC
PGD
SendCommand (command)
To send a command to select a specific TAP register.
1.
2.
3.
4.
TMS
TCK
TDO
TDI
The TMS Header is clocked into the device to
select the Shift IR state
The command is clocked into the device on
TDI while holding signal TMS low.
The last Most Significant bit (MSb) of the
command is clocked in while setting TMS
high.
The TMS Footer is clocked in on TMS to return
the TAP controller to the Run/Test Idle state.
TDI = 0
SendCommand Pseudo Operation
TMS Header = 1100
‘1’
TMS = 1
TMS Header = 1100
SendCommand 4-WIRE
SendCommand 2-WIRE
TDO = X
‘1’
‘0’
Command (5’h07) + TMS = 0
TDI=iLSb
TMS = 0
‘0’
TDO = X
Command = 5’h07
iLSb
1
Command (MSb) + TMS = 1
TDI=iMSb
Restrictions:
Example:
None.
SendCommand (5’h07)
TMS = 1
Command (MSb)
+ TMS = 1
iMSb
‘1’
X
TDO = X
TDI = 0
TMS Footer = 10
‘1’
PIC32MX
TMS Footer = 10
TMS = 1
‘0’
DS61145G-page 11
TDO = X