PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 204

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC24FJ128GA010 FAMILY
TABLE 24-2:
DS39747E-page 204
PWRSAV
RCALL
REPEAT
RESET
RETFIE
RETLW
RETURN
RLC
RLNC
RRC
RRNC
SE
SETM
SL
SUB
SUBB
SUBR
SUBBR
SWAP
TBLRDH
Mnemonic
Assembly
PWRSAV
RCALL
RCALL
REPEAT
REPEAT
RESET
RETFIE
RETLW
RETURN
RLC
RLC
RLC
RLNC
RLNC
RLNC
RRC
RRC
RRC
RRNC
RRNC
RRNC
SE
SETM
SETM
SETM
SL
SL
SL
SL
SL
SUB
SUB
SUB
SUB
SUB
SUBB
SUBB
SUBB
SUBB
SUBB
SUBR
SUBR
SUBR
SUBR
SUBBR
SUBBR
SUBBR
SUBBR
SWAP.b
SWAP
TBLRDH
INSTRUCTION SET OVERVIEW (CONTINUED)
#lit1
Expr
Wn
#lit14
Wn
#lit10,Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
Ws,Wnd
f
WREG
Ws
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
Wn
Wn
Ws,Wd
Assembly Syntax
Go into Sleep or Idle mode
Relative Call
Computed Call
Repeat Next Instruction lit14 + 1 times
Repeat Next Instruction (Wn) + 1 times
Software Device Reset
Return from Interrupt
Return with Literal in Wn
Return from Subroutine
f = Rotate Left through Carry f
WREG = Rotate Left through Carry f
Wd = Rotate Left through Carry Ws
f = Rotate Left (No Carry) f
WREG = Rotate Left (No Carry) f
Wd = Rotate Left (No Carry) Ws
f = Rotate Right through Carry f
WREG = Rotate Right through Carry f
Wd = Rotate Right through Carry Ws
f = Rotate Right (No Carry) f
WREG = Rotate Right (No Carry) f
Wd = Rotate Right (No Carry) Ws
Wnd = Sign-Extended Ws
f = FFFFh
WREG = FFFFh
Ws = FFFFh
f = Left Shift f
WREG = Left Shift f
Wd = Left Shift Ws
Wnd = Left Shift Wb by Wns
Wnd = Left Shift Wb by lit5
f = f – WREG
WREG = f – WREG
Wn = Wn – lit10
Wd = Wb – Ws
Wd = Wb – lit5
f = f – WREG – (C)
WREG = f – WREG – (C)
Wn = Wn – lit10 – (C)
Wd = Wb – Ws – (C)
Wd = Wb – lit5 – (C)
f = WREG – f
WREG = WREG – f
Wd = Ws – Wb
Wd = lit5 – Wb
f = WREG – f – (C)
WREG = WREG – f – (C)
Wd = Ws – Wb – (C)
Wd = lit5 – Wb – (C)
Wn = Nibble Swap Wn
Wn = Byte Swap Wn
Read Prog<23:16> to Wd<7:0>
Description
© 2009 Microchip Technology Inc.
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
3 (2)
3 (2)
3 (2)
# of
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
WDTO, Sleep
None
None
None
None
None
None
None
None
C, N, Z
C, N, Z
C, N, Z
N, Z
N, Z
N, Z
C, N, Z
C, N, Z
C, N, Z
N, Z
N, Z
N, Z
C, N, Z
None
None
None
C, N, OV, Z
C, N, OV, Z
C, N, OV, Z
N, Z
N, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
None
None
None
Status Flags
Affected