PIC16F84A-20I/SS Microchip Technology, PIC16F84A-20I/SS Datasheet - Page 290
![IC MCU FLASH 1KX14 EE 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F84A-20I/SS
Manufacturer Part Number
PIC16F84A-20I/SS
Description
IC MCU FLASH 1KX14 EE 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-20I/SS
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Data Rom Size
64 B
Height
1.75 mm
Length
7.2 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPI3-DB16F84A - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F84A-20I/SS
Manufacturer:
MICROCHIP
Quantity:
2 560
Part Number:
PIC16F84A-20I/SS
Manufacturer:
MIC
Quantity:
20 000
- Current page: 290 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
17.3.5
17.3.6
DS31017A-page 17-14
Slave Mode
Slave Select Synchronization
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the SSPIF interrupt flag bit is set.
While in slave mode the external clock is supplied by the external clock source on the SCK pin.
This external clock must meet the minimum high and low times as specified in the electrical spec-
ifications.
While in sleep mode, the slave can transmit/receive data. When a byte is receive the device will
wake-up from sleep.
The SS pin allows a synchronous slave mode. The SPI must be in slave mode with SS pin
control enabled (SSPCON1<3:0> = 04h). The pin must not be driven low for the SS pin to
function as an input. The Data Latch must be high. When the SS pin is low, transmission
and reception are enabled and the SDO pin is driven. When the SS pin goes high, the SDO
pin is no longer driven, even if in the middle of a transmitted byte, and becomes a floating
output. External pull-up/ pull-down resistors may be desirable, depending on the application.
When the SPI module resets, the bit counter is forced to 0. This can be done by either by forcing
the SS pin to a high level or clearing the SSPEN bit.
To emulate two-wire communication, the SDO pin can be connected to the SDI pin. When the
SPI needs to operate as a receiver the SDO pin can be configured as an input. This disables
transmissions from the SDO. The SDI can always be left as an input (SDI function) since it cannot
create a bus conflict.
Note 1: When the SPI is in Slave Mode with SS pin control enabled, (SSPCON<3:0> =
Note 2: If the SPI is used in Slave Mode with CKE is set, then the SS pin control must be
0100) the SPI module will reset if the SS pin is set to V
enabled.
Preliminary
1997 Microchip Technology Inc.
DD
.
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