ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet - Page 215

• Manufacturer Part Number: ATMEGA169V-1MC
• Description: IC MCU AVR 16K 1.8V 1MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169V-1MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Low Power Waveform
Operation in Sleep Mode
Display Blanking
Port Mask
2514H–AVR–05/03
To reduce toggle activity and hence power consumption a low power waveform can be
selected by writing LCDAB to one. Low power waveform requires two subsequent
frames with the same display data to obtain zero DC voltage. Consequently data latch-
ing and Interrupt Flag is only set every second frame. Default and low power waveform
is shown in Figure 102 for 1/3 duty and 1/3 bias. For other selections of duty and bias,
the effect is similar.
Figure 102. Default and Low Power Waveform
When synchronous LCD clock is selected (LCDCS = 0) the LCD display will operate in
Idle mode and Power-save mode with any clock source.
An asynchronous clock from TOSC1 can be selected as LCD clock by writing the
LCDCS bit to one when Calibrated Internal RC Oscillator is selected as system clock
source. The LCD will then operate in Idle mode, ADC Noise Reduction mode and
Power-save mode.
When EXCLK in ASSR Register is written to one, and asynchronous clock is selected,
the external clock input buffer is enabled and an external clock can be input on Timer
Oscillator 1 (TOSC1) pin instead of a 32 kHz crystal. See “Asynchronous operation of
the Timer/Counter” on page 138 for further details.
Before entering Power-down mode, Standby mode or ADC Noise Reduction mode with
synchronous LCD clock selected, the user have to disable the LCD. Refer to “Disabling
the LCD” on page 218.
When LCDBL is written to one, the LCD is blanked after completing the current frame.
All segments and common pins are connected to GND, discharging the LCD. Display
memory is preserved. Display blanking should be used before disabling the LCD to
avoid DC voltage across segments, and a slowly fading image.
For LCD with less than 25 segment terminals, it is possible to mask some of the unused
pins and use them as ordinary port pins instead. Refer to Table 95 for details. Unused
common pins are automatically configured as port pins.
-
-
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
SEG0
COM0
SEG0 - COM0
-
-
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
ATmega169V/L
Frame
SEG0
COM0
SEG0 - COM0
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