ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet - Page 220

• Manufacturer Part Number: ATMEGA169V-1MC
• Description: IC MCU AVR 16K 1.8V 1MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169V-1MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LCD Control and Status
Register A – LCDCRA
220
ATmega169V/L
• Bit 7 – LCDEN: LCD Enable
Writing this bit to one enables the LCD Controller/Driver. By writing it to zero, the LCD is
turned off immediately. Turning the LCD Controller/Driver off while driving a display,
enables ordinary port function, and DC voltage can be applied to the display if ports are
configured as output. It is recommended to drive output to ground if the LCD Control-
ler/Driver is disabled to discharge the display.
• Bit 6 – LCDAB: LCD Low Power Waveform
When LCDAB is written logic zero, the default waveform is output on the LCD pins.
When LCDAB is written logic one, the Low Power Waveform is output on the LCD pins.
If this bit is modified during display operation the change takes place at the beginning of
a new frame.
• Bit 5 – Res: Reserved Bit
This bit is reserved bit in the ATmega169 and will always read as zero.
• Bit 4 – LCDIF: LCD Interrupt Flag
This bit is set by hardware at the beginning of a new frame, at the same time as the dis-
play data is updated. The LCD Start of Frame Interrupt is executed if the LCDIE bit and
the I-bit in SREG are set. LCDIF is cleared by hardware when executing the corre-
sponding Interrupt Handling Vector. Alternatively, writing a logical one to the flag clears
LCDIF. Beware that if doing a Read-Modify-Write on LCDCRA, a pending interrupt can
be disabled. If Low Power Waveform is selected the Interrupt Flag is set every second
frame.
• Bit 3 – LCDIE: LCD Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the LCD Start of Frame Inter-
rupt is enabled.
• Bits 2:1 – Res: Reserved Bits
These bits are reserved bits in the ATmega169 and will always read as zero.
• Bit 0 – LCDBL: LCD Blanking
When this bit is written to one, the display will be blanked after completion of a frame. All
segment and common pins will be driven to ground.
Bit
Read/Write
Initial Value
LCDEN
R/W
7
0
LCDAB
R/W
6
0
5
–
R
0
LCDIF
R/W
4
0
LCDIE
R/W
3
0
R
2
–
0
R
1
–
0
LCDBL
R/W
0
0
2514H–AVR–05/03
LCDCRA