PIC24HJ128GP202-I/SP Microchip Technology, PIC24HJ128GP202-I/SP Datasheet - Page 117
![IC PIC MCU FLASH 128K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC24HJ128GP202-I/SP
Manufacturer Part Number
PIC24HJ128GP202-I/SP
Description
IC PIC MCU FLASH 128K 28DIP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
5.PIC24HJ32GP304-EML.pdf
(356 pages)
Specifications of PIC24HJ128GP202-I/SP
Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit or 10-ch x 12-bit
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- PIC24HJ32GP304-EML PDF datasheet #5
- Current page: 117 of 368
- Download datasheet (5Mb)
9.0
FIGURE 9-1:
© 2011 Microchip Technology Inc.
SOSCO
Note 1: This data sheet summarizes the features
SOSCI
Note 1:
R
(2)
2: Some registers and associated bits
OSCILLATOR
CONFIGURATION
2:
3:
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
OSC1
of
PIC24HJ64GPX02/X04
PIC24HJ128GPX02/X04
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 39. “Oscillator (Part
III)”
PIC24H Family Reference Manual”,
which is available from the Microchip
website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
OSC2
Secondary Oscillator
See
If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
The term F
document F
mode is used in any ratio other than 1:1, which is the default.
Figure 9-2
Primary Oscillator
Oscillator
TUN<5:0>
(DS70216)
FRC
POSCMD<1:0>
the
P
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
OSCILLATOR SYSTEM DIAGRAM
CY
refers to the clock source for all the peripherals, while F
LPOSCEN
and F
for PLL details.
Oscillator
LPRC
PIC24HJ32GP302/304,
P
are used interchangeably, except in the case of Doze mode. F
of
POSCCLK
the
S1
S3
÷ 16
families
“dsPIC33F/
FRCDIV<2:0>
and
of
in
PLL
(1)
XTPLL, HSPLL,
ECPLL, FRCPLL
F
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and
provides:
• External and internal oscillator options as clock
• An on-chip Phase-Locked Loop (PLL) to scale the
• An internal FRC oscillator that can also be used
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• An Oscillator Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in
VCO
Clock Fail
sources
internal operating frequency to the required
system clock frequency
with the PLL, thereby allowing full-speed
operation without any external clock generation
hardware
savings
clock failure and takes fail-safe measures
selection.
Figure
CY
S7
XT, HS, EC
(1)
FRCDIV16
refers to the clock source for the CPU. Throughout this
FRCDIVN
PIC24HJ128GPX02/X04
LPRC
S
FRC
OSC
9-1.
Clock Switch
NOSC<2:0> FNOSC<2:0>
S1/S3
S7
S0
S5
S4
S2
S6
P
and F
÷ 2
CY
will be different when Doze
Reset
DOZE<2:0>
oscillator
DS70293E-page 117
WDT, PWRT,
Timer1
FSCM
F
F
F
OSC
system
P (3)
CY (3)
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