PIC24HJ128GP202-I/SP Microchip Technology, PIC24HJ128GP202-I/SP Datasheet - Page 38
![IC PIC MCU FLASH 128K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC24HJ128GP202-I/SP
Manufacturer Part Number
PIC24HJ128GP202-I/SP
Description
IC PIC MCU FLASH 128K 28DIP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
5.PIC24HJ32GP304-EML.pdf
(356 pages)
Specifications of PIC24HJ128GP202-I/SP
Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit or 10-ch x 12-bit
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- PIC24HJ32GP304-EML PDF datasheet #5
- Current page: 38 of 368
- Download datasheet (5Mb)
TABLE 4-15:
DMA5PAD
DMA5CNT
DMA6CON
DMA6REQ
DMA6STA
DMA6STB
DMA6PAD
DMA6CNT
DMA7CON
DMA7REQ
DMA7STA
DMA7STB
DMA7PAD
DMA7CNT
DMACS0
DMACS1
DSADR
Legend:
File Name
03CC
03DC
Addr
03C4
03C6
03C8
03CA
03CE
03D0
03D2
03D4
03D6
03D8
03DA
03DE
03E0
03E2
03E4
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
PWCOL7 PWCOL6 PWCOL5 PWCOL4 PWCOL3 PWCOL2 PWCOL1 PWCOL0
FORCE
FORCE
DMA REGISTER MAP (CONTINUED)
Bit 15
CHEN
CHEN
—
—
—
—
Bit 14
SIZE
SIZE
—
—
—
—
—
—
Bit 13
DIR
DIR
—
—
—
—
—
—
Bit 12
HALF
HALF
—
—
—
—
—
—
NULLW
NULLW
Bit 11
—
—
—
—
—
Bit 10
—
—
—
—
—
—
—
LSTCH<3:0>
Bit 9
—
—
—
—
Bit 8
—
—
—
—
DSADR<15:0>
PAD<15:0>
STA<15:0>
STB<15:0>
PAD<15:0>
STA<15:0>
STB<15:0>
PAD<15:0>
XWCOL7
PPST7
Bit 7
—
—
—
—
XWCOL6 XWCOL5
PPST6
Bit 6
—
—
PPST5
Bit 5
AMODE<1:0>
AMODE<1:0>
CNT<9:0>
CNT<9:0>
CNT<9:0>
XWCOL4
PPST4
Bit 4
IRQSEL<6:0>
IRQSEL<6:0>
XWCOL3
PPST3
Bit 3
—
—
XWCOL2
PPST2
Bit 2
—
—
XWCOL1 XWCOL0
PPST1
Bit 1
MODE<1:0>
MODE<1:0>
PPST0
Bit 0
Resets
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
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