PIC18F4331-I/PT Microchip Technology, PIC18F4331-I/PT Datasheet - Page 5

• Manufacturer Part Number: PIC18F4331-I/PT
• Description: IC PIC MCU FLASH 4KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4331-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F4331-I/PTR; PIC18F4331-I/PTR

2.3
The code memory space extends from 0000h to 3FFFh
(16 Kbytes) in four 4-Kbyte blocks. Addresses 0000h
through 01FFh, however, define a “Boot Block” region
that is treated separately from Block 0. All of these
blocks define code protection boundaries within the
code memory space.
In contrast, code memory panels are defined in 8-Kbyte
boundaries. Panels are discussed in greater detail in
Section 3.2.
FIGURE 2-4:
 2010 Microchip Technology Inc.
000000h
003FFFh
1FFFFFh
3FFFFFh
Note:
Memory Map
Sizes of memory areas not to scale.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
MEMORY MAP AND THE CODE MEMORY SPACE FOR PIC18FXX31 DEVICES
Unimplemented
(PIC18FX331)
Read as ‘0’
Boot Block
8 Kbytes
Block 0
Block 1
PIC18F2331/2431/4331/4431
Address
0000h
0FFFh
0200h
0FFFh
1000h
1FFFh
3FFFh
Range
TABLE 2-2:
MEMORY SIZE/DEVICE
PIC18F2331
PIC18F4331
PIC18F2431
PIC18F4431
(PIC18FX431)
16 Kbytes
Boot Block
Device
Block 0
Block 1
Block 2
Block 3
IMPLEMENTATION OF CODE
MEMORY
0000h
01FFh
0200h
0FFFh
1000h
1FFFh
2000h
2FFFh
3000h
3FFFh
Address
Range
Code Memory Size (Bytes)
000000h - 003FFFh (16K)
000000h - 001FFFh (8K)
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
Controlled By:
Block Code
Protection
DS30500B-page 5