DSPIC33FJ128GP202-E/SO Microchip Technology, DSPIC33FJ128GP202-E/SO Datasheet - Page 265
![IC DSPIC MCU/DSP 128K 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
DSPIC33FJ128GP202-E/SO
Manufacturer Part Number
DSPIC33FJ128GP202-E/SO
Description
IC DSPIC MCU/DSP 128K 28-SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ128GP202-E/SO
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 265 of 402
- Download datasheet (3Mb)
22.0
The Audio Digital-to-Analog Converter (DAC) module
is a 16-bit Delta-Sigma signal converter designed for
audio applications. It has two output channels, left and
right to support stereo applications. Each DAC output
channel provides three voltage outputs, positive DAC
output, negative DAC output, and the midpoint voltage
output
dsPIC33FJ128GP804
dsPIC33FJ64GP802
devices provide positive DAC output and negative DAC
output voltages.
22.1
• 16-bit resolution (14-bit accuracy)
• Second-Order Digital Delta-Sigma Modulator
• 256 X Over-Sampling Ratio
• 128-Tap FIR Current-Steering Analog Recon-
• 100 ksps Maximum Sampling Rate
• User controllable Sample Clock
• Input Frequency 45 kHz max
• Differential Analog Outputs
• Signal-To-Noise: 90 dB
• 4-deep input Buffer
• 16-bit Processor I/O, and DMA interfaces
22.2
The functional block diagram of the Audio DAC module
is shown in Figure 22-1. The Audio DAC module pro-
vides a 4-deep data input FIFO buffer for each output
channel. If the DMA module and/or the processor can-
not provide output data in a timely manner, and the
FIFO becomes empty, the DAC accepts data from the
DAC Default Data register (DACDFLT). This safety fea-
ture is useful for industrial control applications where
2009 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
struction Filter
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
AUDIO DIGITAL-TO-ANALOG
CONVERTER (DAC)
Key Features
DAC Module Operation
for
of
dsPIC33FJ64GPX02/X04,
dsPIC33FJ128GPX02/X04 families of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 33. Audio Digital-to-
Analog Converter (DAC)”, (DS70211) of
the “dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
the
the
and
dsPIC33FJ64GP804
dsPIC33FJ32GP302/304,
devices.
dsPIC33FJ128GP802
and
The
and
Preliminary
the DAC output controls an important processor or
machinery. The DACDFLT register should be initialized
with a “safe” output value. Often the safe output value
is either the midpoint value (0x8000) or a zero value
(0x0000).
The digital interpolator up-samples the input signals,
where the over-sampling ratio is 256x which creates
data points between the user supplied data points.
The interpolator also includes processing by digital
filters to provide “noise shaping” to move the
converter noise above 20 kHz (upper limit of the pass
band). The output of the interpolator drives the Sigma-
Delta modulator. The serial data bit stream from the
Sigma-Delta
reconstruction filter. The differential outputs of the
reconstruction filter are amplified by Op Amps to
provide the required peak-to-peak voltage swing.
22.3
The DAC output data stream can be in a two’s comple-
ment signed number format or as an unsigned number
format.
The Audio DAC module features the ability to accept
the 16-bit input data in a two’s complement signed
number format or as an unsigned number format.
The data formatting is controlled by the Data Format
Control (FORM<8>) bit in the DAC1CON register.
The supported formats are:
• 1 = Signed (two’s complement)
• 0 = Unsigned
If the FORM bit is configured for “Unsigned data” then
the user input data yields the following behavior:
• 0xFFFF = most positive output voltage
• 0x8000 = mid point output voltage
• 0x7FFF = a value just below the midpoint
• 0x0000 = minimum output voltage
If the FORM bit is configured for “signed data” then the
user input data yields the following behavior:
• 0x7FFF = most positive output voltage
• 0x0000 = mid point output voltage
• 0xFFFF = value just below the midpoint
• 0x8000 = minimum output voltage
The Audio DAC provides an analog output proportional
to the digital input value. The maximum 100,000 sam-
ples per second (100 ksps) update rate provides good
quality audio reproduction.
Note:
DAC Output Format
The DAC module is designed specifically
for
recommended
applications.
modulator
audio
applications
is
for
processed
DS70292D-page 265
control
and
by
is
type
not
the
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