DSPIC33FJ128GP202-E/SO Microchip Technology, DSPIC33FJ128GP202-E/SO Datasheet - Page 313
![IC DSPIC MCU/DSP 128K 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
DSPIC33FJ128GP202-E/SO
Manufacturer Part Number
DSPIC33FJ128GP202-E/SO
Description
IC DSPIC MCU/DSP 128K 28-SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ128GP202-E/SO
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 313 of 402
- Download datasheet (3Mb)
TABLE 28-2:
2009 Microchip Technology Inc.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Base
Instr
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
#
BTSC
BTSS
BTST
BTSTS
CALL
CLR
CLRWDT
COM
CP
CP0
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC2
DISI
Mnemonic
Assembly
INSTRUCTION SET OVERVIEW (CONTINUED)
BTSC
BTSC
BTSS
BTSS
BTST
BTST.C
BTST.Z
BTST.C
BTST.Z
BTSTS
BTSTS.C
BTSTS.Z
CALL
CALL
CLR
CLR
CLR
CLR
CLRWDT
COM
COM
COM
CP
CP
CP
CP0
CP0
CPB
CPB
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC
DEC
DEC2
DEC2
DEC2
DISI
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
Ws,#bit4
lit23
Wn
f
WREG
Ws
Acc,Wx,Wxd,Wy,Wyd,AWB
f
f,WREG
Ws,Wd
f
Wb,#lit5
Wb,Ws
f
Ws
f
Wb,#lit5
Wb,Ws
Wb, Wn
Wb, Wn
Wb, Wn
Wb, Wn
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
#lit14
Assembly Syntax
Preliminary
Bit Test f, Skip if Clear
Bit Test Ws, Skip if Clear
Bit Test f, Skip if Set
Bit Test Ws, Skip if Set
Bit Test f
Bit Test Ws to C
Bit Test Ws to Z
Bit Test Ws<Wb> to C
Bit Test Ws<Wb> to Z
Bit Test then Set f
Bit Test Ws to C, then Set
Bit Test Ws to Z, then Set
Call subroutine
Call indirect subroutine
f = 0x0000
WREG = 0x0000
Ws = 0x0000
Clear Accumulator
Clear Watchdog Timer
f = f
WREG = f
Wd = Ws
Compare f with WREG
Compare Wb with lit5
Compare Wb with Ws (Wb – Ws)
Compare f with 0x0000
Compare Ws with 0x0000
Compare f with WREG, with Borrow
Compare Wb with lit5, with Borrow
Compare Wb with Ws, with Borrow
Compare Wb with Wn, skip if =
Compare Wb with Wn, skip if >
Compare Wb with Wn, skip if <
Compare Wb with Wn, skip if
Wn = decimal adjust Wn
f = f – 1
WREG = f – 1
Wd = Ws – 1
f = f – 2
WREG = f – 2
Wd = Ws – 2
Disable Interrupts for k instruction cycles
(Wb – Ws – C)
Description
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
DS70292D-page 313
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
OA,OB,SA,SB
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
Status Flags
WDTO,Sleep
Affected
None
None
None
None
None
None
None
None
None
None
None
None
None
None
N,Z
N,Z
N,Z
C
C
C
C
Z
Z
Z
Z
Z
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