DSPIC33FJ64MC506A-I/PT Microchip Technology, DSPIC33FJ64MC506A-I/PT Datasheet - Page 304
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DSPIC33FJ64MC506A-I/PT
Manufacturer Part Number
DSPIC33FJ64MC506A-I/PT
Description
IC DSPIC MCU/DSP 64K 64-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC506A-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Core Frequency
40MHz
Core Supply Voltage
3.3V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
53
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
53
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC506A-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ64MC506A-I/PTVAO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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dsPIC33FJXXXMCX06A/X08A/X10A
TABLE 26-36: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE)
DS70594B-page 304
AC CHARACTERISTICS
IM10
IM11
IM20
IM21
IM25
IM26
IM30
IM31
IM33
IM34
IM40
IM45
IM50
IM51
Note 1:
Param
No.
2:
3:
T
T
T
T
T
T
T
T
T
T
T
T
C
T
Symbol
SU
SU
SU
AA
R
LO
HI
F
HD
HD
HD
BF
PGD
B
BRG is the value of the I
(I
Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
Typical value for this parameter is 130 ns.
:
:
SCL
2
:
SCL
:
:
:
:
:
:
SCL
:
:
:
C™)” (DS70195) in the “dsPIC33F/PIC24H Family Reference Manual”.
SCL
DAT
STA
STO
SDA
SCL
DAT
STA
STO
Clock Low Time 100 kHz mode
Clock High Time 100 kHz mode
SDAx and SCLx
Fall Time
SDAx and SCLx
Rise Time
Data Input
Setup Time
Data Input
Hold Time
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
Output Valid
From Clock
Bus Free Time
Bus Capacitive Loading
Pulse Gobbler Delay
Characteristic
2
C™ Baud Rate Generator. Refer to Section 19. “Inter-Integrated Circuit
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
Preliminary
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
20 + 0.1 C
20 + 0.1 C
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
Min
250
100
0.2
4.7
1.3
0.5
40
65
—
—
—
—
—
—
—
—
0
0
(1)
B
B
1000
3500
1000
Max
300
300
100
300
300
400
390
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-40°C T
-40°C T
Units
pF
s
s
s
s
s
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
ns
ns
ns
s
s
s
s
s
s
ns
2009 Microchip Technology Inc.
A
A
+125°C for Extended
+85°C for Industrial
C
from 10 to 400 pF
C
from 10 to 400 pF
Only relevant for
Repeated Start
condition
After this period the
first clock pulse is
generated
Time the bus must be
free before a new
transmission can start
B
B
is specified to be
is specified to be
Conditions
See Note 3
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