PIC24HJ128GP504-I/PT Microchip Technology, PIC24HJ128GP504-I/PT Datasheet - Page 195
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PIC24HJ128GP504-I/PT
Manufacturer Part Number
PIC24HJ128GP504-I/PT
Description
IC PIC MCU FLASH 128K 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
5.PIC24HJ32GP304-EML.pdf
(356 pages)
Specifications of PIC24HJ128GP504-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
35
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 12-bit
Controller Family/series
PIC24
No. Of I/o's
35
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ128GP504-I/PT
Manufacturer:
MICROCHIP
Quantity:
3 400
Company:
Part Number:
PIC24HJ128GP504-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24HJ128GP504-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
19.0
19.1
The Enhanced Controller Area Network (ECAN) module
is a serial interface, useful for communicating with other
CAN modules or microcontroller devices. This interface/
protocol was designed to allow communications within
noisy
PIC24HJ64GPX02/X04 and PIC24HJ128GPX02/X04
devices contain up to two ECAN modules.
The ECAN module is a communication controller
implementing the CAN 2.0 A/B protocol, as defined in
the BOSCH CAN specification. The module supports
CAN 1.2, CAN 2.0A, CAN 2.0B Passive and CAN 2.0B
Active
implementation is a full CAN system. The CAN specifi-
cation is not covered within this data sheet. The reader
can refer to the BOSCH CAN specification for further
details.
The module features are as follows:
• Implementation of the CAN protocol, CAN 1.2,
• Standard and extended data frames
• 0-8 bytes data length
• Programmable bit rate up to 1 Mbit/sec
• Automatic response to remote transmission
• Up to eight transmit buffers with application speci-
• Up to 32 receive buffers (each buffer can contain
• Up to 16 full (standard/extended identifier)
• Three full acceptance filter masks
• DeviceNet™ addressing support
• Programmable wake-up functionality with
© 2009 Microchip Technology Inc.
CAN 2.0A and CAN 2.0B
requests
fied prioritization and abort capability (each buffer
can contain up to 8 bytes of data)
up to 8 bytes of data)
acceptance filters
integrated low-pass filter
Note 1: This data sheet summarizes the features
environments.
versions
2: Some registers and associated bits
ENHANCED CAN (ECAN™)
MODULE
Overview
of
PIC24HJ64GPX02/X04
PIC24HJ128GPX02/X04
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 21. “Enhanced
Controller Area Network (ECAN™)”
(DS70226) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is avail-
able
(www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
of
from
the
the
The
the
protocol.
PIC24HJ32GP302/304,
PIC24HJ32GP302/304,
Microchip
families
The
website
module
and
Preliminary
of
• Programmable Loopback mode supports self-test
• Signaling via interrupt capabilities for all CAN
• Programmable clock source
• Programmable link to input capture module (IC2
• Low-power Sleep and Idle mode
The CAN bus module consists of a protocol engine and
message buffering/control. The CAN protocol engine
handles all functions for receiving and transmitting
messages on the CAN bus. Messages are transmitted
by first loading the appropriate data registers. Status
and errors can be checked by reading the appropriate
registers. Any message detected on the CAN bus is
checked for errors and then matched against filters to
see if it should be received and stored in one of the
receive registers.
19.2
The ECAN module transmits various types of frames
which include data messages, or remote transmission
requests initiated by the user, as other frames that are
automatically generated for control purposes. The
following frame types are supported:
• Standard Data Frame:
• Extended Data Frame:
• Remote Frame:
• Error Frame:
• Overload Frame:
• Interframe Space:
operation
receiver and transmitter error states
for CAN1) for time-stamping and network
synchronization
A standard data frame is generated by a node when
the node wishes to transmit data. It includes an 11-bit
Standard Identifier (SID), but not an 18-bit Extended
Identifier (EID).
An extended data frame is similar to a standard data
frame, but includes an extended identifier as well.
It is possible for a destination node to request the
data from the source. For this purpose, the
destination node sends a remote frame with an iden-
tifier that matches the identifier of the required data
frame. The appropriate data source node sends a
data frame as a response to this remote request.
An error frame is generated by any node that detects
a bus error. An error frame consists of two fields: an
error flag field and an error delimiter field.
An overload frame can be generated by a node as a
result of two conditions. First, the node detects a
dominant bit during interframe space which is an ille-
gal condition. Second, due to internal conditions, the
node is not yet able to start reception of the next
message. A node can generate a maximum of 2
sequential overload frames to delay the start of the
next message.
Interframe space separates a proceeding frame (of
whatever type) from a following data or remote
frame.
Frame Types
DS70293D-page 195