DSPIC30F4011-30I/PT Microchip Technology, DSPIC30F4011-30I/PT Datasheet - Page 223

• Manufacturer Part Number: DSPIC30F4011-30I/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4011-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401130IPT

Timer2 and Timer3 Selection Mode .................................... 82
Timer2/3 Module ................................................................. 67
Timer4/5 Module ................................................................. 73
TimerQ (QEI Module) External Clock Timing
Timing Characteristics
Timing Diagrams
 2005 Microchip Technology Inc.
Gate Operation ........................................................... 64
Interrupt....................................................................... 65
Operation During Sleep Mode .................................... 64
Prescaler..................................................................... 64
Real-Time Clock ......................................................... 65
Register Map............................................................... 66
32-bit Synchronous Counter Mode ............................. 67
32-bit Timer Mode....................................................... 67
ADC Event Trigger...................................................... 70
Gate Operation ........................................................... 70
Interrupt....................................................................... 70
Operation During Sleep Mode .................................... 70
Register Map............................................................... 71
Timer Prescaler........................................................... 70
Register Map............................................................... 76
Characteristics .......................................................... 187
A/D Conversion
Bandgap Start-up Time............................................. 184
CAN Module I/O........................................................ 202
CLKOUT and I/O....................................................... 182
External Clock........................................................... 177
I
I
Input Capture (CAPx)................................................ 188
Motor Control PWM Module...................................... 190
Motor Control PWM Module Falult............................ 190
OC/PWM Module ...................................................... 189
Oscillator Start-up Timer ........................................... 183
Output Compare Module........................................... 188
Power-up Timer ........................................................ 183
QEI Module Index Pulse ........................................... 192
Reset......................................................................... 183
SPI Module
Timer 1, 2, 3, 4 and 5 External Clock........................ 185
TimerQ (QEI Module) External Clock ....................... 187
Watchdog Timer........................................................ 183
Center Aligned PWM .................................................. 95
Dead-Time .................................................................. 96
Edge Aligned PWM..................................................... 94
PWM Output ............................................................... 83
Time-out Sequence on Power-up
2
2
C Bus Data
C Bus Start/Stop Bits
RTC Interrupts .................................................... 65
RTC Oscillator Operation.................................... 65
10-Bit High-speed (CHPS = 01,
10-Bit High-speed (CHPS = 01,
Master Mode ..................................................... 198
Slave Mode ....................................................... 200
Master Mode ..................................................... 198
Slave Mode ....................................................... 200
Master Mode (CKE = 0) .................................... 193
Master Mode (CKE = 1) .................................... 194
Slave Mode (CKE = 0) ...................................... 195
Slave Mode (CKE = 1) ...................................... 196
(MCLR Not Tied to V
SIMSAM = 0, ASAM = 0,
SSRC = 000) ............................................ 205
SIMSAM = 0, ASAM = 1,
SSRC = 111, SAMC = 00001) .................. 206
DD
), Case 1...................... 146
Preliminary
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 44
U
UART
dsPIC30F4011/4012
Time-out Sequence on Power-up
Time-out Sequence on Power-up
DC Characteristics - Internal RC Accuracy .............. 179
A/D Conversion
Bandgap Start-up Time ............................................ 184
Brown-out Reset....................................................... 184
CAN Module I/O ....................................................... 202
CLKOUT and I/O ...................................................... 182
External Clock .......................................................... 178
I
I
Input Capture............................................................ 188
Motor Control PWM Module ..................................... 190
Oscillator Start-up Timer........................................... 184
Output Compare Module .......................................... 188
Power-up Timer ........................................................ 184
QEI Module
Quadrature Decoder................................................. 191
Reset ........................................................................ 184
Simple OC/PWM Mode ............................................ 189
SPI Module
Timer1 External Clock .............................................. 185
Timer2 and Timer4 External Clock ........................... 186
Timer3 and Timer5 External Clock ........................... 186
Watchdog Timer ....................................................... 184
PLL Clock ................................................................. 179
Address Detect Mode ............................................... 117
Auto Baud Support ................................................... 118
Baud Rate Generator ............................................... 117
Enabling and Setting Up UART ................................ 115
Loopback Mode ........................................................ 117
Module Overview...................................................... 113
Operation During CPU Sleep and Idle Modes.......... 118
Receiving Data ......................................................... 116
Reception Error Handling ......................................... 116
2
2
C Bus Data (Master Mode) .................................... 199
C Bus Data (Slave Mode) ...................................... 201
(MCLR Not Tied to V
(MCLR Tied to V
10-Bit High-speed............................................. 207
External Clock .................................................. 187
Index Pulse....................................................... 192
Master Mode (CKE = 0).................................... 193
Master Mode (CKE = 1).................................... 194
Slave Mode (CKE = 0)...................................... 195
Slave Mode (CKE = 1)...................................... 197
Alternate I/O ..................................................... 115
Disabling........................................................... 115
Enabling ........................................................... 115
Setting Up Data, Parity and Stop Bit
In 8-bit or 9-bit Data Mode................................ 116
Interrupt ............................................................ 116
Receive Buffer (UxRCB)................................... 116
Framing Error (FERR) ...................................... 117
Idle Status ........................................................ 117
Parity Error (PERR) .......................................... 117
Receive Break .................................................. 117
Receive Buffer Overrun Error (OERR Bit) ........ 116
Selections................................................. 115
DD
) ......................................... 146
DD
), Case 2 ..................... 146
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