PIC16F84-10I/SO Microchip Technology, PIC16F84-10I/SO Datasheet - Page 51

• Manufacturer Part Number: PIC16F84-10I/SO
• Description: IC MCU FLASH 1KX14 EE 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F84-10I/SO

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 13
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 68Byte
• Cpu Speed: 10MHz
• No. Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MIL309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.11
The Watchdog Timer is a free running on-chip RC
oscillator which does not require any external
components. This RC oscillator is separate from the
RC oscillator of the OSC1/CLKIN pin. That means that
the WDT will run even if the clock on the OSC1/CLKIN
and OSC2/CLKOUT pins of the device has been
stopped, for example, by execution of a SLEEP
instruction. During normal operation a WDT time-out
generates a device RESET. If the device is in SLEEP
mode, a WDT Wake-up causes the device to wake-up
and continue with normal operation. The WDT can be
permanently disabled by programming configuration bit
WDTE as a ’0’ (Section 8.1).
8.11.1
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). The time-out periods vary with
temperature, V
FIGURE 8-18: WATCHDOG TIMER BLOCK DIAGRAM
TABLE 8-7
Address Name
2007h
81h
Legend: x = unknown. Shaded cells are not used by the WDT.
Note 1: See Figure 8-1 and Figure 8-2 for operation of the PWRTE bit.
Note: PSA and PS2:PS0 are bits in the OPTION_REG register.
1998 Microchip Technology Inc.
2: See Figure 8-1, Figure 8-2 and Section 8.13 for operation of the Code and Data protection bits.
Watchdog Timer (WDT)
WDT PERIOD
Config. bits
OPTION_
REG
DD
SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
and process variations from part to
RBPU
Bit 7
(2)
WDT Timer
Enable Bit
WDT
INTEDG
Bit 6
(2)
From TMR0 Clock Source
(Figure 6-6)
T0CS
Bit 5
(2)
•
0
1
PSA
T0SE
Bit 4
M
U
X
(2)
PWRTE
Bit 3
PSA
part (see DC specs). If longer time-out periods are
desired, a prescaler with a division ratio of up to 1:128
can be assigned to the WDT under software control by
writing to the OPTION_REG register. Thus, time-out
periods up to 2.3 seconds can be realized.
The CLRWDT and SLEEP instructions clear the WDT
and the postscaler (if assigned to the WDT) and pre-
vent it from timing out and generating a device
RESET condition.
The TO bit in the STATUS register will be cleared upon
a WDT time-out.
8.11.2
It should also be taken into account that under worst
case conditions (V
WDT prescaler) it may take several seconds before a
WDT time-out occurs.
0
(1)
Time-out
MUX
8 - to -1 MUX
WDT
WDTE
Postscaler
Bit 2
PS2
WDT PROGRAMMING CONSIDERATIONS
•
1
8
FOSC1
Bit 1
PS1
DD
PSA
To TMR0 (Figure 6-6)
= Min., Temperature = Max., max.
FOSC0
Bit 0
PS0
PS2:PS0
PIC16F8X
1111 1111
Power-on
Value on
Reset
(2)
DS30430C-page 51
other resets
Value on all
1111 1111