PIC18C252-I/SO Microchip Technology, PIC18C252-I/SO Datasheet - Page 224

IC MCU OTP 16KX16 A/D 28SOIC

PIC18C252-I/SO

Manufacturer Part Number
PIC18C252-I/SO
Description
IC MCU OTP 16KX16 A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C252-I/SO

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
24
Ram Memory Size
1536Byte
Cpu Speed
40MHz
No. Of Timers
4
Interface
I2C, SPI, USART
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
4
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18C
Core
PIC
Data Ram Size
1536 B
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3DB18C452 - BOARD DAUGHTER ICEPIC3309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C252-I/SO
Manufacturer:
Microchip Technology
Quantity:
1 840
Part Number:
PIC18C252-I/SO
Manufacturer:
Microchip
Quantity:
400
PIC18CXX2
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
† If WDT causes wake-up, this bit is cleared.
DS39026C-page 222
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TO
PD
TO
PD
Q1
=
=
=
=
?
?
1 †
0
operation
Enter SLEEP mode
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
1
1
SLEEP
No
Q2
0000
WDT postscaler,
TO,
PD
WDT,
0000
Process
Data
Q3
0000
Go to
sleep
Q4
0011
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
WREG
C
REG
WREG
C
Z
N
REG
WREG
C
REG
WREG
C
Z
N
REG
WREG
C
REG
WREG
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ’f’
(WREG) – (f) – (C)
N,OV, C, DC, Z
Subtract f from WREG with borrow
[ label ] SUBFWB
0
d
a
Subtract register 'f' and carry flag
(borrow) from WREG (2’s comple-
ment method). If 'd' is 0, the result is
stored in WREG. If 'd' is 1, the result
is stored in register 'f' (default). If ’a’ is
0, the Access Bank will be selected,
overriding the BSR value. If ’a’ is 1,
then the bank will be selected as per
the BSR value (default).
1
1
SUBFWB
SUBFWB
SUBFWB
Read
Q2
0101
3
2
1
FF
2
0
0
1
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
f
[0,1]
[0,1]
2001 Microchip Technology Inc.
255
; result is negative
; result is positive
; result is zero
01da
REG, 1, 0
REG, 0, 0
REG, 1, 0
Process
Data
Q3
ffff
f [,d [,a]
dest
destination
Write to
Q4
ffff

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