DSPIC33FJ32GS610-I/PT Microchip Technology, DSPIC33FJ32GS610-I/PT Datasheet - Page 217
![IC MCU/DSP 32KB FLASH 100TQFP](/photos/28/60/286070/100-tqfp-pt_sml.jpg)
DSPIC33FJ32GS610-I/PT
Manufacturer Part Number
DSPIC33FJ32GS610-I/PT
Description
IC MCU/DSP 32KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ32GS610-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Part Number:
DSPIC33FJ32GS610-I/PT
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Quantity:
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Company:
Part Number:
DSPIC33FJ32GS610-I/PT
Manufacturer:
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Quantity:
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Part Number:
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Quantity:
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REGISTER 13-2:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-2
bit 1
bit 0
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
Note 1: When 32-bit timer operation is enabled (T32 = 1) in the Timer Control register (TxCON<3>), the TSIDL bit
TON
R/W-0
U-0
—
2: When the 32-bit timer operation is enabled (T32 = 1) in the Timer Control (TxCON<3>) register, these bits
(2)
must be cleared to operate the 32-bit timer in Idle mode.
have no effect.
TON: Timery On bit
1 = Starts 16-bit Timer
0 = Stops 16-bit Timer
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue timer operation when device enters Idle mode
0 = Continue timer operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timer
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS<1:0>: Timer
11 = 1:256 prescale value
10 = 1:64 prescale value
01 = 1:8 prescale value
00 = 1:1 prescale value
Unimplemented: Read as ‘0’
TCS: Timer
1 = External clock from TxCK pin
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
TyCON: TIMER CONTROL REGISTER (y = 3, 5)
(2)
y
Clock Source Select bit
W = Writable bit
‘1’ = Bit is set
y
Gated Time Accumulation Enable bit
TSIDL
R/W-0
R/W-0
(2)
OSC
TCKPS<1:0>
y
y
y
Input Clock Prescale Select bits
(1)
/2)
(1)
R/W-0
U-0
(2)
Preliminary
—
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
(2)
(2)
U-0
U-0
—
—
x = Bit is unknown
TCS
R/W-0
U-0
—
(2)
DS70591C-page 217
U-0
U-0
—
—
bit 8
bit 0
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