ATMEGA3290PV-10AU Atmel, ATMEGA3290PV-10AU Datasheet - Page 57

• Manufacturer Part Number: ATMEGA3290PV-10AU
• Description: IC MCU 32K 4X40 LCD CTRL 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA3290PV-10AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK504 - STARTER KIT AVR EXP MOD 100P LCDATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA3290PV-8AU; ATMEGA3290PV-8AU

11.3
11.3.1
8021G–AVR–03/11
Register Description
MCUCR – MCU Control Register
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
Self-Programming” on page 281
• Bit 0 – IVCE: Interrupt Vector Change Enable
The IVCE bit must be written to logic one to enable change of the IVSEL bit. IVCE is cleared by
hardware four cycles after it is written or when IVSEL is written. Setting the IVCE bit will disable
interrupts, as explained in the IVSEL description above. See Code Example below.
Bit
0x35 (0x55)
Read/Write
Initial Value
Assembly Code Example
C Code Example
Move_interrupts:
;Get MCUCR
in r16, MCUCR
mov r17, r16
void Move_interrupts(void)
{
}
; Enable change of Interrupt Vectors
ori r16, (1<<IVCE)
out MCUCR, r16
; Move interrupts to Boot Flash section
ori r17, (1<<IVSEL)
out MCUCR, r17
ret
/* Enable change of Interrupt Vectors */
MCUCR |= (1<<IVCE);
/* Move interrupts to Boot Flash section */
MCUCR |= (1<<IVSEL);
JTD
R/W
7
0
BODS
R/W
6
0
for details.
BODSE
R/W
5
0
PUD
R/W
4
0
”Boot Loader Support – Read-While-Write
R
3
–
0
ATmega329P/3290P
R
2
–
0
IVSEL
R/W
1
0
IVCE
R/W
0
0
MCUCR
57