DSPIC30F5011-20I/PT Microchip Technology, DSPIC30F5011-20I/PT Datasheet - Page 188

• Manufacturer Part Number: DSPIC30F5011-20I/PT
• Description: IC DSPIC MCU/DSP 66K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5011-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F5011-20I/PTG; DSPIC30F501120/PT; DSPIC30F501120IPT; DSPIC30F501120IPT

dsPIC30F5011/5013
FIGURE 23-13:
TABLE 23-30: DCI MODULE (AC-LINK MODE) TIMING REQUIREMENTS
DS70116J-page 188
AC CHARACTERISTICS
CS60
CS61
CS62
CS65
CS66
CS70
CS71
CS72
CS75
CS76
CS77
CS78
CS80
Note 1:
Param
SDI
(CSDI)
SDO
(CSDO)
SYNC
(COFS)
BIT_CLK
(CSCK)
No.
2:
3:
T
T
T
T
T
T
T
T
T
T
T
T
T
These parameters are characterized but not tested in manufacturing.
These values assume BIT_CLK frequency is 12.288 MHz.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
Symbol
CS80
SACL
SYNCLO
SYNCHI
SYNC
OVDACL
LSb
RACL
RACL
BCLKL
BCLKH
BCLK
HACL
FACL
FACL
CS61
BIT_CLK Low Time
BIT_CLK High Time
BIT_CLK Period
Input Setup Time to
Falling Edge of BIT_CLK
Input Hold Time from
Falling Edge of BIT_CLK
SYNC Data Output Low Time
SYNC Data Output High Time
SYNC Data Output Period
Rise Time, SYNC, SDATA_OUT
Fall Time, SYNC, SDATA_OUT
Rise Time, SYNC, SDATA_OUT
Fall Time, SYNC, SDATA_OUT
Output valid delay from rising
edge of BIT_CLK
DCI MODULE (AC-LINK MODE) TIMING CHARACTERISTICS
CS65 CS66
MSb IN
MSb
Characteristic
CS60
(1)(2)
CS71
CS62
CS72
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
Min
36
36
—
—
—
—
—
—
—
—
—
—
—
CS76
Typ
40.7
40.7
81.4
19.5
20.8
1.3
10
10
10
10
—
—
—
(3)
Max
45
45
10
10
25
25
25
25
15
—
—
—
—
CS76
CS21
-40°C ≤ T
-40°C ≤ T
CS75
Units
ns
ns
ns
ns
ns
μs
μs
μs
ns
ns
ns
ns
ns
© 2011 Microchip Technology Inc.
CS20
A
A
≤ +85°C for Industrial
≤ +125°C for Extended
Bit clock is input
Note 1
Note 1
Note 1
C
C
C
C
CS70
LOAD
LOAD
LOAD
LOAD
Conditions
= 50 pF, V
= 50 pF, V
= 50 pF, V
= 50 pF, V
CS75
DD
DD
DD
DD
LSb
= 5V
= 5V
= 3V
= 3V