DSPIC30F5011-30I/PT Microchip Technology, DSPIC30F5011-30I/PT Datasheet
DSPIC30F5011-30I/PT
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DSPIC30F501130IPT
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DSPIC30F5011-30I/PT Summary of contents
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... Family Silicon Errata and Data Sheet Clarification The dsPIC30F5011/5013 family devices that you have received conform functionally to the current Device Data Sheet (DS70116H), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs ...
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... TABLE 2: SILICON ISSUE SUMMARY Item Module Feature Number CPU MAC Class 1. Instructions with ±4 Address Modification CPU 2. DAW.b Instruction PSV — 3. Operations CPU Nested DO 4. Loops 2 I C™ Read 5. Operations on I2CCON SFR Write 6. Operations on I2CTRN SFR UART Write 7. Operations on U1MODE ...
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... Mode Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. dsPIC30F5011/5013 Issue Summary Execution of the Sleep instruction (PWRSAV #0) may cause incorrect program operation after the device wakes up from Sleep. The current consumption during Sleep may also increase beyond the specifications listed in the device data sheet ...
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... Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A4). 1. Module: CPU Sequential MAC class instructions, which prefetch data from Y data space using ± ...
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... Example 2 is demonstrated in © 2010 Microchip Technology Inc. dsPIC30F5011/5013 These instructions are identified in Example 2 occurs. Also, always use Work around 2 if the C compiler is used to generate code for dsPIC30F5011/5013 devices. (2) Examples of Incorrect Operation ADDC W0, [W1++], W2 ; SUBB.b W0, [++W1 SUBBR.b W0, [++W1 CPB W0, [W1++], W4 ; RLC [W1 ...
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... Module: CPU When using two DO loops in a nested fashion, terminating the inner-level DO loop by setting the EDT bit (CORCON<11>) will produce unexpected results. Specifically, the device may continue executing code within the outer DO loop forever. This erratum does not affect the operation of the MPLAB C30 compiler ...
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... I2CCON second SFR read POP SR © 2010 Microchip Technology Inc. dsPIC30F5011/5013 Work around 2: For C Language Source Code For C programmers, the MPLAB C30 v1.20.02 toolsuite provides a built-in function that may be incorporated in the application source code. This function may be used to read the I2CCON SFR. ...
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... Module Data writes to the I2CTRN Special Function Register may not be correct at device operation greater than 20 MIPS for V in the range of 4. 5.5V (or 10 MIPS V in the range 3.6V). If the dsPIC DSC device needs to operate at a throughput higher than 20 MIPS, the user should incorporate the suggested work around while writing to the I2CTRN SFR ...
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... MOV W1, U1MODE ;write to U1MODE POP SR © 2010 Microchip Technology Inc. dsPIC30F5011/5013 Work around 2: For C Language Source Code For C programmers, the MPLAB C30 v1.30 toolsuite provides a built-in function that may be incorporated in the application source code. This in the DD function may be used to write to the U1MODE and ...
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... Module: DCI For this release of silicon, the DCI module should not be stopped when the device enters Idle mode. Work around Do not set the DCISIDL bit (DCICON1<13>). This will ensure the DCI module continues to run when the device enters Idle mode. ...
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... SRbits.IPL; \ SET_CPU_IPL (ipl); } (void) 0; #define RESTORE_CPU_IPL (saved_to) SET_CPU_IPL (saved_to) #include "p30fxxxx.h" int save_to; SET_AND_SAVE_CPU_IPL (save_to RESTORE_CPU_IPL (save_to) © 2010 Microchip Technology Inc. dsPIC30F5011/5013 EXAMPLE 8: .include "p30fxxxx.inc" ... DISI #4 ; protect the disable ; of INT1 BCLR IEC1, #INT1IE ; disable interrupt 1 ... ; next instruction ;protected by DISI term ...
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... For modification of the Interrupt 1 setting, the INTERRUPT_PROTECT macro can be used. This macro disables interrupts before executing the desired expression, as Example 11. This macro is not distributed with the compiler. EXAMPLE 11: USING INTERRUPT_PROTECT MACRO #define INTERRUPT_PROTECT ( int save_sr; \ SET_AND_SAVE_CPU_IPL (save_sr, 7);\ x; \ RESTORE_CPU_IPL (save_sr); } (void) 0; ...
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... © 2010 Microchip Technology Inc. dsPIC30F5011/5013 12. Module: Output Compare If the desired duty cycle is ‘0’ (OCxRS = 0), the module will generate a high level glitch The second problem is that on the next cycle after the glitch, the OC pin does not go high, or, in other words, it misses the next compare for any value written on OCxRS ...
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... Module: ADC ADC event triggers from the INT0 pin will not wake-up the device from Sleep mode if the SMPI bits are non-zero. This means that if the ADC is configured to generate an interrupt after a certain number of INT0 triggered conversions, the ADC conversions will not be triggered and the device will remain in Sleep ...
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... NOP .endr ; Place SLEEP instruction in the last word of program memory PWRSAV #0 © 2010 Microchip Technology Inc. dsPIC30F5011/5013 This can be accomplished by replacing all occurrences of the PWRSAV #0 instruction with a function call to a suitably aligned subroutine. The address( ) attribute provided by the MPLAB ASM30 assembler can be utilized to correctly align the instructions in the subroutine ...
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... Work around 2: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 512 kHz Low-Power RC (LPRC) Oscillator with a 64:1 postscaler mode. This enables the device to operate at 0.002 MIPS, thereby significantly reducing consumption of the device. Similarly, instead of ...
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... Clear the I C receiver interrupt flag SI2CF back to step 1 to continue receiving incoming data bytes. © 2010 Microchip Technology Inc. dsPIC30F5011/5013 Work around 2: Use this work around for applications in which the receiver interrupt is required. Assuming that the RBF and the I2COV flags in the I2CSTAT ...
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... Module: I/O If the user application enables the auto-baud feature in the UART module, the I/O pin multiplexed with the IC1 (Input Capture1) pin cannot be used as a digital input. However, the external interrupt function (INT1) can be used. Work around None. Affected Silicon Revisions ...
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... © 2010 Microchip Technology Inc. dsPIC30F5011/5013 25. Module: I When the I I2CEN bit in the I2CCON register, the dsPIC DSC device generates a glitch on the SDA and SCL addresses. In pins. This glitch falsely indicates “Communication Start” to all devices on the I a bus collision in a multi-master configuration. ...
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... Work around 1: Use program Flash memory instead of data EEPROM to store constant data. Work around 2: Use less than 16 bits in each word in the available data EEPROM, excluding the Most Significant bit. FIGURE 1: dsPIC30F5011/5013 DATA EEPROM High Byte (Odd Address) 0x7FFC01 0x7FFC03 B 0x7FFC05 0x7FFC07 ...
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... FRC oscillator. Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F5011/5013 28. Module: I The port pin, RC15, is multiplexed with the primary DD oscillator pin, OSC2. When pin RC15 is required for digital input/output, specific bits in the Oscillator Configuration register, FOSC, may be set up as follows: • ...
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... Module: ADC If the ADC module enabled state when the device enters Sleep mode as a result of executing a PWRSAV #0 instruction, the device power-down current (I ) may exceed the specifications listed PD in the device data sheet. This may happen even if the ADC module is disabled by clearing the ADON bit prior to entering Sleep mode ...
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... Characteristic No. V Input Low Voltage IL DI19 SDA, SCL V Input High Voltage IH DI29 SDA, SCL © 2010 Microchip Technology Inc. dsPIC30F5011/5013 specifica- IL Standard Operating Conditions: 3.3V and 5.0V (±10%) (unless otherwise stated) -40°C ≤ T Operating temperature -40°C ≤ T Min Typ Max V — ...
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... This document replaces the following errata documents: • DS80201, “dsPIC30F5011/5013 Rev. A1 Silicon Errata” • DS80210, “dsPIC30F5011/5013 Rev. A1/A2 Silicon Errata” • DS80223, “dsPIC30F5011/5013 Rev. A3 Silicon Errata” • DS80399, “dsPIC30F5011/5013 Rev. A4 Silicon Errata” Rev B Document (8/2009) Updated silicon issue 10 (Interrupt Controller). Rev C Document (2/2010) ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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