PIC18F4680-I/PT Microchip Technology, PIC18F4680-I/PT Datasheet - Page 471

• Manufacturer Part Number: PIC18F4680-I/PT
• Description: IC MCU FLASH 32KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 25 C
• On-chip Adc: 11-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4680 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Data EEPROM Memory ................................................... 105
Data Memory ..................................................................... 67
DAW ................................................................................. 380
DC and AC Characteristics .............................................. 453
DC Characteristics ........................................................... 428
DCFSNZ .......................................................................... 381
DECF ............................................................................... 380
DECFSZ ........................................................................... 381
Demonstration Boards
Development Support ...................................................... 411
Device Differences ........................................................... 463
Device Overview .................................................................. 7
Device Reset Timers .......................................................... 45
Direct Addressing ............................................................... 89
Disable Mode ................................................................... 324
E
ECAN Module .................................................................. 273
 2004 Microchip Technology Inc.
Associated Registers ............................................... 109
EEADR and EEADRH Registers ............................. 105
EECON1 and EECON2 Registers ........................... 105
Operation During Code-Protect ............................... 108
Protection Against Spurious Write ........................... 108
Reading .................................................................... 107
Using ........................................................................ 108
Write Verify .............................................................. 107
Writing ...................................................................... 107
Access Bank .............................................................. 69
and the Extended Instruction Set ............................... 91
Bank Select Register (BSR) ....................................... 67
General Purpose Registers ........................................ 69
Map for PIC18F2X8X/4X8X ....................................... 68
Special Function Registers ........................................ 70
Power-Down and Supply Current ............................ 420
Supply Voltage ......................................................... 419
PICDEM 1 ................................................................ 414
PICDEM 17 .............................................................. 415
PICDEM 18R ........................................................... 415
PICDEM 2 Plus ........................................................ 414
PICDEM 3 ................................................................ 414
PICDEM 4 ................................................................ 414
PICDEM LIN ............................................................ 415
PICDEM USB ........................................................... 415
PICDEM.net Internet/Ethernet ................................. 414
Features (table) ............................................................ 9
New Core Features ...................................................... 7
Oscillator Start-up Timer (OST) ................................. 45
PLL Lock Time-out ..................................................... 45
Power-up Timer (PWRT) ........................................... 45
Baud Rate Setting .................................................... 332
Bit Time Partitioning ................................................. 332
Bit Timing Configuration Registers .......................... 338
Calculating T
CAN Baud Rate Registers ....................................... 311
CAN Control and Status Registers .......................... 275
CAN Controller Register Map .................................. 319
CAN I/O Control Register ......................................... 314
CAN Interrupt Registers ........................................... 315
CAN Interrupts ......................................................... 339
Nominal Bit Time ............................................. 335
Acknowledge ................................................... 341
Bus Activity Wake-up ....................................... 341
Bus-Off ............................................................. 341
Code Bits ......................................................... 340
Error ................................................................. 341
Message Error ................................................. 340
Q
, Nominal Bit Rate and
PIC18F2585/2680/4585/4680
Preliminary
CAN Message Buffers ............................................. 326
CAN Message Transmission ................................... 327
CAN Modes of Operation ........................................ 324
CAN Registers ......................................................... 275
Configuration Mode ................................................. 324
Dedicated CAN Receive Buffer Registers ............... 287
Dedicated CAN Transmit Buffer Registers .............. 282
Disable Mode ........................................................... 324
Error Detection ........................................................ 338
Error Modes State (diagram) ................................... 339
Error Recognition Mode ........................................... 325
Filter-Mask Truth (table) .......................................... 330
Functional Modes .................................................... 325
Information Processing Time (IPT) .......................... 335
Lengthening a Bit Period ......................................... 337
Listen Only Mode ..................................................... 325
Loopback Mode ....................................................... 325
Message Acceptance Filters and Masks ......... 302, 330
Message Acceptance Mask and
Message Reception ................................................. 329
Normal Mode ........................................................... 324
Oscillator Tolerance ................................................. 337
Overview .................................................................. 273
Phase Buffer Segments ........................................... 335
Programmable TX/RX and Auto-RTR Buffers ......... 294
Programming Time Segments ................................. 337
Propagation Segment .............................................. 335
Sample Point ........................................................... 335
Shortening a Bit Period ............................................ 337
Synchronization ....................................................... 336
Synchronization Segment ........................................ 335
Time Quanta ............................................................ 335
Values for ICODE (table) ......................................... 340
Receive ........................................................... 340
Receiver Bus Passive ...................................... 341
Receiver Overflow ........................................... 341
Receiver Warning ............................................ 341
Transmit ........................................................... 340
Transmitter Bus Passive .................................. 341
Transmitter Warning ........................................ 341
Dedicated Receive .......................................... 326
Dedicated Transmit ......................................... 326
Programmable Auto-RTR ................................ 327
Programmable Transmit/Receive .................... 326
Aborting ........................................................... 327
Initiating ........................................................... 327
Priority ............................................................. 328
Acknowledge ................................................... 338
Bit .................................................................... 338
CRC ................................................................. 338
Error Modes and Counters .............................. 338
Error States ..................................................... 338
Form ................................................................ 338
Stuff Bit ............................................................ 338
Mode 0 (Legacy Mode) .................................... 325
Mode 1 (Enhanced Legacy Mode) .................. 325
Mode 2 (Enhanced FIFO Mode) ...................... 326
Filter Operation ................................................ 331
Enhanced FIFO Mode ..................................... 330
Priority ............................................................. 329
Time-Stamping ................................................ 330
Hard ................................................................. 336
Resynchronization ........................................... 336
Rules ............................................................... 336
DS39625B-page 469