PIC18LF6520-I/PT Microchip Technology, PIC18LF6520-I/PT Datasheet - Page 25

IC MCU FLASH 16KX16 EEPROM64TQFP

PIC18LF6520-I/PT

Manufacturer Part Number
PIC18LF6520-I/PT
Description
IC MCU FLASH 16KX16 EEPROM64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF6520-I/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
52
Eeprom Memory Size
1024Byte
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
5
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Quantity
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2.4
The EC and ECIO Oscillator modes require an external
clock source to be connected to the OSC1 pin. The
feedback device between OSC1 and OSC2 is turned
off in these modes to save current. There is a maximum
1.5
wake-up from Sleep mode.
In the EC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 2-4 shows the pin connections for the EC
Oscillator mode.
FIGURE 2-4:
The ECIO Oscillator mode functions like the EC mode,
except that the OSC2 pin becomes an additional gen-
eral purpose I/O pin. The I/O pin becomes bit 6 of
PORTA (RA6). Figure 2-5 shows the pin connections
for the ECIO Oscillator mode.
FIGURE 2-6:
 2004 Microchip Technology Inc.
Clock from
Ext. System
(from Configuration
s start-up required after a Power-on Reset, or
bit Register)
External Clock Input
OSC1
OSC2
F
OSC
PIC18F6520/8520/6620/8620/6720/8720
/4
EXTERNAL CLOCK INPUT
OPERATION
(EC CONFIGURATION)
PLL BLOCK DIAGRAM
Crystal
PLL Enable
Osc
HS Osc
OSC1
OSC2
PIC18FXX20
Comparator
F
F
OUT
IN
Phase
Loop
Filter
Divide by 4
FIGURE 2-5:
2.5
A Phase Locked Loop circuit (PLL) is provided as a
programmable option for users that want to multiply the
frequency of the incoming crystal oscillator signal by 4.
For an input clock frequency of 10 MHz, the internal
clock frequency will be multiplied to 40 MHz. This is
useful for customers who are concerned with EMI due
to high-frequency crystals.
The PLL is one of the modes of the FOSC<2:0> config-
uration bits. The oscillator mode is specified during
device programming.
The PLL can only be enabled when the oscillator con-
figuration bits are programmed for HS mode. If they are
programmed for any other mode, the PLL is not
enabled and the system clock will come directly from
OSC1. Also, PLL operation cannot be changed “on-
the-fly”. To enable or disable it, the controller must
either cycle through a Power-on Reset, or switch the
clock source from the main oscillator to the Timer1
oscillator and back again. See Section 2.6 “Oscillator
Switching Feature” for details on oscillator switching.
A PLL lock timer is used to ensure that the PLL has
locked before device execution starts. The PLL lock
timer has a time-out that is called T
Clock from
Ext. System
HS/PLL
RA6
VCO
EXTERNAL CLOCK INPUT
OPERATION
(ECIO CONFIGURATION)
OSC1
I/O (OSC2)
PIC18FXX20
PLL
DS39609B-page 23
.
SYSCLK

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