PIC18F2682-I/SP Microchip Technology, PIC18F2682-I/SP Datasheet - Page 278

IC PIC MCU FLASH 40KX16 28-DIP

PIC18F2682-I/SP

Manufacturer Part Number
PIC18F2682-I/SP
Description
IC PIC MCU FLASH 40KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2682-I/SP

Core Size
8-Bit
Program Memory Size
80KB (40K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
 Details
PIC18F2682/2685/4682/4685
REGISTER 23-1:
DS39761C-page 278
Mode 0
Mode 1
Mode 2
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3-1
bit 0
bit 4-0
bit 7
REQOP2:REQOP0: Request CAN Operation Mode bits
1xx = Request Configuration mode
011 = Request Listen Only mode
010 = Request Loopback mode
001 = Request Disable mode
000 = Request Normal mode
ABAT: Abort All Pending Transmissions bit
1 = Abort all pending transmissions (in all transmit buffers)
0 = Transmissions proceeding as normal
Mode 0:
WIN2:WIN0: Window Address bits
These bits select which of the CAN buffers to switch into the access bank area. This allows access to the
buffer registers from any data memory bank. After a frame has caused an interrupt, the ICODE3:ICODE0
bits can be copied to the WIN3:WIN0 bits to select the correct buffer. See Example 23-2 for a code
example.
111 = Receive Buffer 0
110 = Receive Buffer 0
101 = Receive Buffer 1
100 = Transmit Buffer 0
011 = Transmit Buffer 1
010 = Transmit Buffer 2
001 = Receive Buffer 0
000 = Receive Buffer 0
Unimplemented: Read as ‘0’
Mode 1:
Unimplemented: Read as ‘0’
Mode 2:
FP3:FP0: FIFO Read Pointer bits
These bits point to the message buffer to be read.
0111:0000 = Message buffer to be read
1111:1000 = Reserved
REQOP2
REQOP2
REQOP2
R/W-1
R/W-1
R/W-1
CANCON: CAN CONTROL REGISTER
REQOP1
REQOP1
REQOP1
R/W-0
R/W-0
R/W-0
S = Settable bit
W = Writable bit
‘1’ = Bit is set
REQOP0
REQOP0
REQOP0
R/W-0
R/W-0
R/W-0
R/S-0
ABAT
R/S-0
ABAT
R/S-0
ABAT
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
WIN2
FP3
R-0
U0
R/W-0
WIN1
FP2
U-0
R-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WIN0
FP1
U-0
R-0
FP0
U-0
U-0
R-0
bit 0

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