PIC18F2685-I/SP Microchip Technology, PIC18F2685-I/SP Datasheet - Page 447

• Manufacturer Part Number: PIC18F2685-I/SP
• Description: IC PIC MCU FLASH 48KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2685-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 96KB (48K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 27-15:
TABLE 27-17: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
© 2009 Microchip Technology Inc.
70
71
71A
72
72A
73A
74
75
76
77
80
82
83
Note 1:
Param
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SS
SCK
SCK
SDO
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SC
SC
SS
SC
SC
SS
SS
SC
SC
SC
SC
Symbol
B
DO
DO
2
Requires the use of parameter 73A.
Only if parameter 71A and 72A are used.
Refer to Figure 27-4 for load conditions.
H2
H2
L2
L2
H2
L2
L2
L2
H
L
H2
L2
B
R
F
DO
DO
SS
SC
SC
DI
DO
DO
SS
DI
L
H
L,
H,
L
V
V SDO Data Output Valid after SS ↓
H,
Z SS↑ to SDO Output High-Impedance
V,
SS ↓ to SCK ↓ or SCK ↑ Input
SCK Input High Time
SCK Input Low Time
Last Clock Edge of Byte 1 to the fIrst Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SDO Data Output Valid after SCK
Edge
Edge
SS ↑ after SCK Edge
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
MSb In
MSb
74
71
75, 76
Characteristic
72
PIC18F2682/2685/4682/4685
bit 6 - - - - - -1
bit 6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
80
LSb In
LSb
1.25 T
1.25 T
1.5 T
Min
T
100
CY
CY
40
40
10
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
77
Max Units Conditions
100
100
25
45
25
50
50
50
—
—
—
—
—
—
—
—
DS39761C-page 447
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
DD
DD
DD
= 2.0V
= 2.0V
= 2.0V