AT32UC3A3256-CTUT Atmel, AT32UC3A3256-CTUT Datasheet - Page 86
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AT32UC3A3256-CTUT
Manufacturer Part Number
AT32UC3A3256-CTUT
Description
IC MCU AVR32 256KB FLASH 144TBGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A3256-CTUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-TBGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3256-CTUT
Manufacturer:
ATMEL
Quantity:
2 757
15.5.4
15.5.5
32058HS–AVR32–03/09
USB
Processor and Architecture
1.
2. USBFSM and UHADDR1/2/3 registers are not available.
1. Incorrect Processor ID
2. Bus error should be masked in Debug mode
3. Read Modify Write (RMW) instructions on data outside the internal RAM does not
4.
5.
Place two NOPs instructions after each SSRF or MTSR instruction setting IxM or GM in SR.
In host mode, in case of an unexpected device disconnection whereas a usb reset is being
sent by the usb controller, the UHCON.RESET bit may not been cleared by the hardware at
the end of the reset.
Fix/Workaround
A software workaround consists in testing (by polling or interrupt) the disconnection
(UHINT.DDISCI == 1) while waiting for the end of reset (UHCON.RESET == 0) to avoid
being stuck.
Do not use USBFSM register.
Fix/Workaround
Do not use USBFSM register and use HCON[6:0] field instead for all the pipes.
The processor ID reads 0x01 and not 0x02 as it should.
Fix/Workaround
None.
If a bus error occurs during debug mode, the processor will not respond to debug com-
mands through the DINST register.
Fix/Workaround
A reset of the device will make the CPU respond to debug commands again.
work.
Read Modify Write (RMW) instructions on data outside the internal RAM does not work.
Fix/Workaround
Do not perform RMW instructions on data outside the internal RAM.
even though the part has less flash.
Fix/Workaround
The flash address space is wrapping, so it is possible to use the CRC value by calculating
CRC of the flash content concatenated with itself N times. Where N is 512 kB/flash size.
The instructions following in the pipeline the instruction masking the interrupt through SR
may behave abnormally.
Fix/Workaround
USB No end of host reset signaled upon disconnection
Need two NOPs instruction after instructions masking interrupts
CRC calculation of a locked device will calculate CRC for 512 kB of flash memory,
AT32UC3A
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