AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 692

• Manufacturer Part Number: AT91SAM7XC512-CU
• Description: MCU ARM 512K HS FLASH 100-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7XC512-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Interface Type: MII, SPI, TWI
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

44.3.2
44.3.2.1
44.3.2.2
44.3.3
44.3.3.1
44.3.4
44.3.4.1
44.3.4.2
44.3.5
44.3.5.1
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AT91SAM7XC512/256/128 Preliminary
Controller Area Network (CAN)
Embedded FLash Controller (EFC)
Ethernet MAC (EMAC)
Peripheral Input/Output (PIO)
CAN: Low Power Mode and Error Frame
CAN: Low Power Mode and Pending Transmit Messages
EFC: Embedded Flash Access Time
EMAC: Possible Event Loss when Reading EMAC_ISR
EMAC: Possible Event Loss when Reading the Statistics Register Block
PIO: Leakage on PB27 - PB30
If the Low Power Mode is activated while the CAN is generating an error frame, this error frame
may be shortened.
None
No pending transmit messages may be sent once the CAN Controller enters Low-power Mode.
Check that all messages have been sent by reading the related Flags before entering Low-
power Mode.
The embedded Flash maximum access time is 25 MJHz (instead of 30MHz)at zero Wait State
(FWS = 0).
The maximum operating frequency with one Wait State (FWS = 1) is still 55 MHz.
Set one Wait State (FWS = 1) if the frequency is above 25 MHz.
If an event occurs within the same clock cycle in which the EMAC_ISR is read, the correspond-
ing bit might be cleared even though it has not been read at 1. This might lead to the loss of this
event.
Each time the software reads EMAC_ISR, it has to check the contents of the Transmit Status
Register (EMAC_TSR), the Receive Status Register (EMAC_RSR) and the Network Status
Register (EMAC_NSR), as the possible lost event is still notified in one of these registers.
If an event occurs within the same clock cycle during which a statistics register is read, the cor-
responding counter might lose this event. This might lead to the loss of the incrementation of
one for this counter.
None
When PB27, PB28, PB29 or PB30 (the I/O lines multiplexed with the analog inputs) are set as
digital inputs with pull-up disabled, the leakage can be 9 µA in worst case and 90 nA in typical
case per I/O when the I/O is set externally at low level.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
6209F–ATARM–17-Feb-09