P89LPC936FDH,518 NXP Semiconductors, P89LPC936FDH,518 Datasheet - Page 77

IC 80C51 MCU FLASH 16K 28TSSOP

P89LPC936FDH,518

Manufacturer Part Number
P89LPC936FDH,518
Description
IC 80C51 MCU FLASH 16K 28TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC936FDH,518

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
26
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
26
Number Of Timers
2
Operating Supply Voltage
21 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit
On-chip Dac
2-ch x 8-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4339-2
935277841518
P89LPC936FDH-T
P89LPC936FDH-T
NXP Semiconductors
8.28.1
8.28.2
8.28.3
8.28.4
8.28.5
8.28.6
8.28.7
8.28.8
8.28.9
8.28.10
8.29
8.30
9
9.1
9.2
9.3
9.4
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
9.4.6
9.5
9.5.1
9.5.2
9.5.3
9.5.4
9.6
9.7
9.8
9.9
10
11
11.1
12
12.1
12.2
13
13.1
13.2
14
15
16
17
17.1
17.2
17.3
A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 56
Static characteristics. . . . . . . . . . . . . . . . . . . . 57
Dynamic characteristics . . . . . . . . . . . . . . . . . 60
Other characteristics . . . . . . . . . . . . . . . . . . . . 67
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 69
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 73
Legal information. . . . . . . . . . . . . . . . . . . . . . . 74
Fixed channel, single conversion mode . . . . . 53
Fixed channel, continuous conversion mode . 54
Auto scan, single conversion mode . . . . . . . . 54
Auto scan, continuous conversion mode . . . . 54
Dual channel, continuous conversion mode . . 54
Dual start immediately (P89LPC935/936) . . . 55
DAC output to a port pin with high output
impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
I
General description . . . . . . . . . . . . . . . . . . . . 49
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Flash organization . . . . . . . . . . . . . . . . . . . . . 50
Using flash as data storage . . . . . . . . . . . . . . 50
Flash programming and erasing . . . . . . . . . . . 50
In-circuit programming . . . . . . . . . . . . . . . . . . 50
In-application programming . . . . . . . . . . . . . . 50
ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Power-on reset code execution . . . . . . . . . . . 51
Hardware activation of the boot loader . . . . . . 52
User configuration bytes . . . . . . . . . . . . . . . . . 52
User sector security bytes . . . . . . . . . . . . . . . 52
General description . . . . . . . . . . . . . . . . . . . . 52
Features and benefits . . . . . . . . . . . . . . . . . . . 52
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . 53
A/D operating modes . . . . . . . . . . . . . . . . . . . 53
Single step mode . . . . . . . . . . . . . . . . . . . . . . 54
Conversion start modes . . . . . . . . . . . . . . . . . 54
Timer triggered start . . . . . . . . . . . . . . . . . . . . 54
Start immediately . . . . . . . . . . . . . . . . . . . . . . 54
Edge triggered . . . . . . . . . . . . . . . . . . . . . . . . 55
Boundary limits interrupt . . . . . . . . . . . . . . . . . 55
Clock divider . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Power-down and Idle mode . . . . . . . . . . . . . . 55
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
ISP entry mode . . . . . . . . . . . . . . . . . . . . . . . . 66
Comparator electrical characteristics . . . . . . . 67
ADC electrical characteristics . . . . . . . . . . . . . 68
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 74
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
OH
as a function of V
OH
. . . . . . . . . . . . . . . . . 59
8-bit microcontroller with accelerated two-clock 80C51 core
17.4
18
19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
P89LPC933/934/935/936
Contact information . . . . . . . . . . . . . . . . . . . . 75
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Document identifier: P89LPC933_934_935_936
Date of release: 12 January 2011
All rights reserved.

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