P89V51RC2FBC,557 NXP Semiconductors, P89V51RC2FBC,557 Datasheet - Page 9

• Manufacturer Part Number: P89V51RC2FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V51RC2FBC,557

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: P89V5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: 80C51
• Family Name: 89V
• Maximum Speed: 40 MHz
• For Use With: 622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-2429; 935277725557; P89V51RC2FBC

NXP Semiconductors
Table 3.
[1]
[2]
P89V51RB2_RC2_RD2_5
Product data sheet
Symbol
RST
EA
ALE/PROG
n.c.
XTAL1
XTAL2
V
V
DD
SS
ALE loading issue: When ALE pin experiences higher loading (>30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor of 3 k to 50 k to V
For 6-clock mode, ALE is emitted at
P89V51RB2/RC2/RD2 pin description
Pin
DIP40
9
31
30
-
19
18
40
20
TQFP44
4
29
27
6, 17, 28,
39
15
14
38
16
1
3
of crystal frequency.
PLCC44
10
35
33
1, 12, 23,
34
21
20
44
22
Rev. 05 — 12 November 2009
…continued
Type
I
I
I/O
I/O
I
O
I
I
Description
Reset: While the oscillator is running, a HIGH logic state
on this pin for two machine cycles will reset the device. If
the PSEN pin is driven by a HIGH-to-LOW input transition
while the RST input pin is held HIGH, the device will enter
the external host mode, otherwise the device will enter the
normal operation mode.
External Access Enable: EA must be connected to V
order to enable the device to fetch code from the external
program memory. EA must be strapped to V
program execution. The EA pin can tolerate a high voltage
of 12 V.
Address Latch Enable: ALE is the output signal for
latching the low byte of the address during an access to
external memory. This pin is also the programming pulse
input (PROG) for flash programming. Normally the ALE
is emitted at a constant rate of
and can be used for external timing and clocking. One ALE
pulse is skipped during each access to external data
memory. However, if AO is set to ‘1’, ALE is disabled.
not connected
Crystal 1: Input to the inverting oscillator amplifier and
input to the internal clock generator circuits.
Crystal 2: Output from the inverting oscillator amplifier.
Power supply
Ground
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
DD
1
, e.g., for ALE pin.
6
the crystal frequency
© NXP B.V. 2009. All rights reserved.
DD
for internal
9 of 80
SS
[2]
[1]
in