P87C554SBAA,512 NXP Semiconductors, P87C554SBAA,512 Datasheet - Page 45

IC 80C51 MCU 16K OTP 64-PLCC

P87C554SBAA,512

Manufacturer Part Number
P87C554SBAA,512
Description
IC 80C51 MCU 16K OTP 64-PLCC
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheets

Specifications of P87C554SBAA,512

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
40
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Cpu Family
87C
Device Core
80C51
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
I2C/UART
Total Internal Ram Size
512Byte
# I/os (max)
40
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
7-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1254-5
935263385512
P87C554SBAA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C554SBAA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Table 6.
2002 Mar 25
STATUS
STATUS
(S1STA)
(S1STA)
CODE
80C51 8-bit microcontroller – 12 clock operation
16K/512 OTP/RAM, 8 channel 10-bit A/D, I
capture/compare, high I/O
08H
10H
18H
20H
28H
30H
38H
A START condition has
been transmitted
A repeated START
condition has been
transmitted
SLA+W has been
transmitted; ACK has
b
been received
SLA+W has been
transmitted; NOT ACK
h
has been received
Data byte in S1DAT has
been transmitted; ACK
h
has been received
Data byte in S1DAT has
been transmitted; NOT
ACK h
ACK has been received
Arbitration lost in
SLA+R/W or
D
Data bytes
Master Transmitter Mode
SIO1 HARDWARE
SIO1 HARDWARE
STATUS OF THE
STATUS OF THE
diti
b
b
I
b
2
C BUS AND
b
h
i
d
b
i
i
d
d
i
d
Load SLA+W
Load SLA+W or
Load SLA+R
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
No S1DAT action or
No S1DAT action
TO/FROM S1DAT
TO/FROM S1DAT
APPLICATION SOFTWARE RESPONSE
2
C, PWM,
STA
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TO S1CON
43
STO
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SLA+W will be transmitted;
ACK bit will be received
As above
SLA+W will be transmitted;
SIO1 will be switched to MST/REC mode
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
I
not addressed slave will be entered
A START condition will be transmitted when the
bus becomes free
2
NEXT ACTION TAKEN BY SIO1 HARDWARE
C bus will be released;
P87C554
Product data

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