LPC2888FET180/01,5 NXP Semiconductors, LPC2888FET180/01,5 Datasheet - Page 3

• Manufacturer Part Number: LPC2888FET180/01,5
• Description: IC ARM7 MCU FLASH 1MB 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2800r

Specifications of LPC2888FET180/01,5

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, UART/USART, USB
• Peripherals: DMA, I²S, LCD, WDT
• Number Of I /o: 85
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC28
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 81
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM10092
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• For Use With: OM10092 - EVAL BOARD FOR LPC288X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4528

NXP Semiconductors
4. Block diagram
LPC2880_LPC2888_3
Preliminary data sheet
Fig 1. Block diagram
AOUTA_DAC,
AOUTB_DAC
AOUT_LNA
AINA, AINB
(1) LPC2888 only.
AIN_LNA,
AOUTB,
AIN[4:0]
AOUTA,
START,
or +5 V
XTALO
+1.5 V
STOP
XTALI
X32O
V
3.3 V,
1.8 V
X32I
Px.y
REF,
OSCILLATOR
OSCILLATOR
LPC2880/2888
INTERFACE
AND PLLs
FLASH
FLASH
1 MB
CONVERTER
DC-TO-DC
(1)
GENERATION
PURPOSE I/O
CONVERTER
INTERFACE
WATCHDOG
REAL-TIME
TRIPLE ANALOG
CONTROL
10-BIT A/D
GENERAL
DUAL ANALOG
SYSTEM
ROUTER
CLOCK
CLOCK
EVENT
SRAM
SRAM
TIMER
64 kB
UNIT
OUTPUT
INPUT
AHB TO APB
INTERFACE
BRIDGE 0
BOOT
ROM
ROM
FIFO
FIFO
16/32-bit ARM microcontrollers with external memory interface
Rev. 03 — 17 April 2008
AHB TO APB
BRIDGE 3
MULTI-LAYER AHB
JTAG DEBUG
8 kB CACHE
INTERFACE
ARM7TDMI
AHB TO APB
BRIDGE 1
FIFO
FIFO
OUTPUT
I
I
2
2
INPUT
S-BUS
S-BUS
CONTROLLER
EXTERNAL
MEMORY
INTERFACE
A[20:0],
D[15:0],
TIMER 0
TIMER 1
I
2
AHB TO APB
32-BIT
32-BIT
etc.
C-BUS
BRIDGE 2
LPC2880; LPC2888
CONTROLLER
INTERRUPT
VECTORED
interface
SD/MMC CARD
register
INTERFACE
INTERFACE
UART WITH
CONTROLLER
IrDA
LCD
DP, DM, VBUS,
GP DMA
RREF, RPU
WITH DMA
HS USB
© NXP B.V. 2008. All rights reserved.
MCLK, MCMD
MD[3:0]
TXD, RTS
RXD, CTS
LCD bus
SCL, SDA
DATI
BCKI, WSI
DATO
BCKO, DCLKO,
WSO
002aac296
3 of 43