Z16F6411AL20SG Zilog, Z16F6411AL20SG Datasheet - Page 247
Z16F6411AL20SG
Manufacturer Part Number
Z16F6411AL20SG
Description
IC ZNEO MCU FLASH 64K 100LQFP
Manufacturer
Zilog
Series
Encore!® ZNEOr
Datasheet
1.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F6411AL20SG
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
Z16F6x
Core
Zneo
Data Bus Width
16 bit
Data Ram Size
4 B
Interface Type
ESPI, I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
76
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z16F2800100ZCOG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4570
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 112. I
Table 113. I
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
Note:
Note:
I
2
C State Register
2
2
ACKV
C Baud Rate Low Byte Register (I2CBRL)
C State Register (I2CSTATE) - Description when DIAG = 0
R
7
7
0
BRH = I
Most significant byte,
If the
the current value of the I
BRL = I
Least significant byte, BRG[7:0], of the I
If the
the current value of the I
The read only I
I
When the
on the internal state of the I
When the
Controller state machine as shown in
ACKV—ACK valid
This bit is set if sending data (Master or Slave) and the
the byte just transmitted. This bit is monitored if it is appropriate for software to verify the
ACK
2
C Bus Controller.
value before writing the next byte to be sent. To operate in this mode, the data register
DIAG
DIAG
2
2
ACK
C Baud rate low byte
C Baud rate high byte
DIAG
DIAG
R
6
6
0
bit in the I
bit in the I
2
bit of the I
C State register provides information on the state of the I
bit of the I
2
2
BRG
AS
C Mode register is set to 1, a read of the I2CBRH register returns
C Mode register is set to 1, a read of the I2CBRL register returns
R
5
5
0
2
2
C Baud Rate Counter[15:8].
C Baud Rate Counter[7:0].
[15:8], of the I
2
P R E L I M I N A R Y
2
2
C Mode register is set, this register returns the value of the I
C Mode register is cleared, this register provides information
C Controller and I
DS
R
4
4
0
FF-E244H
FF-E245H
Table 114
BRL
FFH
R/W
2
2
C Baud Rate Generator’s reload value.
C Baud Rate Generator’s reload value.
10B
2
R
3
3
0
C Bus as shown in
on page 232.
ACK
RSTR
R
2
2
0
bit in this register is valid for
I
2
C Master/Slave Controller
Product Specification
ZNEO
Table
SCLOUT
R
X
1
1
113.
2
C bus and the
Z16F Series
BUSY
X
R
0
0
2
C
231
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