CY8CLED03D02-56LTXI Cypress Semiconductor Corp, CY8CLED03D02-56LTXI Datasheet - Page 11

IC POWERPSOC 3CH 1A 56VQFN

CY8CLED03D02-56LTXI

Manufacturer Part Number
CY8CLED03D02-56LTXI
Description
IC POWERPSOC 3CH 1A 56VQFN
Manufacturer
Cypress Semiconductor Corp
Series
PowerPSoC® CY8CLEDr
Datasheet

Specifications of CY8CLED03D02-56LTXI

Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
DALI, DMX512, I²C, IrDA, SPI, UART/USART
Peripherals
LED, LVD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
428-2882 - KIT STARTER POWERPSOC LIGHTING428-2281 - KIT EVAL POWERPSOC LIGHTING428-2271 - KIT EVAL COLOR-LOCK428-2270 - KIT STARTER DEMO LIGHTING770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
428-2925

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8CLED03D02-56LTXI
Manufacturer:
Cypress
Quantity:
128
Figure 5-2. Analog System Block Diagram
5.3 The Analog Multiplexer System
The Analog Mux Bus connects to every GPIO pin in ports 0 to 2.
Pins can be connected to the bus individually or in any combi-
nation. The bus also connects to the analog system for analysis
with comparators and analog-to-digital converters. It can be split
into two sections for simultaneous dual-channel processing. An
additional analog input multiplexer provides a second path to
bring Port 0 pins to the analog array.
Switch control logic enables selected pins to precharge continu-
ously under hardware control. This enables capacitive
measurement for applications such as touch sensing. Other
multiplexer applications include:
When designing capacitive sensing applications, refer to the
latest signal-to-noise signal level requirements application notes,
found at
cation Notes. In general, and unless otherwise noted in the
relevant application notes, the minimum signal-to-noise ratio
(SNR) for CapSense applications is 5:1.
Document Number: 001-46319 Rev. *E
Track pad, finger sensing
Crosspoint connection between any I/O pin combinations
P0[7]
P0[5]
P0[3]
P1[7]
P1[5]
P1[1]
Microcontroller Interface (Address Bus, Data Bus, Etc.)
http://www.cypress.com
Digital System
Interface to
ACol0Mux
ACM0
ACI0[1:0]
ACB00
ASC10
ASD20
AGND=VBG
Configuration
ACol1Mux
Array Input
Array
Vdd
Vss
AC1
> Design Resources > Appli-
ACB01
ASD11
ASC21
ACI1[1:0]
ACM1
SplitMux Bit
BCol1Mux
Generators
Reference
Bandgap
P0[4]
P1[4]
P1[0]
P2[2]
5.4 Additional System Resources
System resources provide additional capability useful in
complete systems. Additional resources include a multiplier,
decimator, low voltage detection, and power on reset. Brief state-
ments describing the merits of each resource follow.
Two multiply accumulates (MACs) provide fast 8-bit multipliers
with 32-bit accumulate, to assist in both general math and
digital filters.
A decimator provides a custom hardware filter for digital signal
processing applications including creation of Delta Sigma
ADCs.
Low Voltage Detection (LVD) interrupts signal the application
of falling voltage levels, while the advanced POR (power on
reset) circuit eliminates the need for a system supervisor.
Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks can be routed
to both the digital and analog systems. The designer can
generate additional clocks using digital PSoC blocks as clock
dividers.
The I2C module provides 100 and 400 kHz communication over
two wires. Slave, master, and multi-master applications are
supported.
An internal 1.3V reference provides an absolute reference for
the analog system, including ADCs and DACs.
Versatile analog multiplexer system.
CY8CLED04G01, CY8CLED03G01
CY8CLED04D01, CY8CLED04D02
CY8CLED03D01, CY8CLED03D02
Page 11 of 47
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