C8051F301-GS Silicon Laboratories Inc, C8051F301-GS Datasheet - Page 81

• Manufacturer Part Number: C8051F301-GS
• Description: IC 8051 MCU 8K FLASH 14-SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F301-GS

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SMBus/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F300DK
• Minimum Operating Temperature: - 40 C
• Package: 14SOIC
• Device Core: 8051
• Family Name: C8051F30x
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300336-1319 - REFERENCE DESIGN STEPPER MOTOR
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1536-5

8.4.2. Stop Mode
Setting the Stop Mode Select bit (PCON.1) causes the CIP-51 to enter Stop mode as soon as the instruc-
tion that sets the bit completes execution. In Stop mode the internal oscillator, CPU, and all digital periph-
erals are stopped; the state of the external oscillator circuit is not affected. Each analog peripheral
(including the external oscillator circuit) may be shut down individually prior to entering Stop Mode. Stop
mode can only be terminated by an internal or external reset. On reset, the CIP-51 performs the normal
reset sequence and begins program execution at address 0x0000.
If enabled, the Missing Clock Detector will cause an internal reset and thereby terminate the Stop mode.
The Missing Clock Detector should be disabled if the CPU is to be put to in STOP mode for longer than the
MCD timeout of 100 µsec.
Bits7–2: GF5–GF0: General Purpose Flags 5-0.
Bit1:
Bit0:
GF5
R/W
Bit7
These are general purpose flags for use under software control.
STOP: Stop Mode Select.
Setting this bit will place the CIP-51 in Stop mode. This bit will always be read as 0.
1: CPU goes into Stop mode (turns off internal oscillator).
IDLE: Idle Mode Select.
Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.
1: CPU goes into Idle mode (shuts off clock to CPU, but clock to Timers, Interrupts, Serial
Ports, and Analog Peripherals are still active).
GF4
R/W
Bit6
SFR Definition 8.12.
GF3
R/W
Bit5
GF2
R/W
Bit4
Rev. 2.9
GF1
R/W
Bit3
PCON: Power Control
GF0
R/W
Bit2
C8051F300/1/2/3/4/5
STOP
R/W
Bit1
IDLE
R/W
Bit0
SFR Address:
00000000
Reset Value
0x87
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