MC9S08AC8CFGE Freescale Semiconductor, MC9S08AC8CFGE Datasheet - Page 296

• Manufacturer Part Number: MC9S08AC8CFGE
• Description: IC MCU 8BIT 8K FLASH 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08AC8CFGE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: S08AC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 700 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3
• Operating Supply Voltage: - 0.3 V to + 5.8 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Appendix A Electrical Characteristics and Timing Specifications
A.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
296
Num C
1
2
3
4
Human Body
Machine
Latch-up
ESD Protection and Latch-Up Immunity
Model
C Human Body Model (HBM)
C Machine Model (MM)
C Charge Device Model (CDM)
C Latch-up Current at T
Series Resistance
Storage Capacitance
Number of Pulse per pin
Series Resistance
Storage Capacitance
Number of Pulse per pin
Minimum input voltage limit
Maximum input voltage limit
Table A-5. ESD and Latch-Up Protection Characteristics
Table A-4. ESD and Latch-up Test Conditions
A
Rating
= 125°C
MC9S08AC16 Series Data Sheet, Rev. 8
Description
Symbol
V
V
V
I
HBM
CDM
LAT
MM
Symbol
R1
R1
C
C
–
–
± 2000
± 200
± 500
± 100
Min
Value
1500
– 2.5
100
200
7.5
Freescale Semiconductor
3
0
3
Max
–
–
–
–
Unit
pF
pF
Ω
Ω
V
V
Unit
mA
V
V
V