C8051F541-IQ Silicon Laboratories Inc, C8051F541-IQ Datasheet - Page 9

• Manufacturer Part Number: C8051F541-IQ
• Description: IC 8051 MCU 16K FLASH 32-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F54xr

Specifications of C8051F541-IQ

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 32-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 25x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 25
• Operating Supply Voltage: 1.8 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F540DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1672 - BOARD PROTOTYPE W/C8051F540336-1669 - KIT DEVELOPMENT FOR C8051F540
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1674

List of Tables
Table 2.1. Product Selection Guide ......................................................................... 17
Table 3.1. Pin Definitions for the C8051F54x .......................................................... 18
Table 4.1. QFP-32 Package Dimensions ................................................................ 23
Table 4.2. QFP-32 Landing Diagram Dimensions ................................................... 24
Table 4.3. QFN-32 Package Dimensions ................................................................ 25
Table 4.4. QFN-32 Landing Diagram Dimensions ................................................... 26
Table 4.5. QFN-24 Package Dimensions ................................................................ 27
Table 4.6. QFN-24 Landing Diagram Dimensions ................................................... 28
Table 6.1. Absolute Maximum Ratings .................................................................... 47
Table 6.2. Global Electrical Characteristics ............................................................. 48
Table 6.3. Port I/O DC Electrical Characteristics ..................................................... 51
Table 6.4. Reset Electrical Characteristics .............................................................. 52
Table 6.5. Flash Electrical Characteristics .............................................................. 52
Table 6.6. Internal High-Frequency Oscillator Electrical Characteristics ................. 53
Table 6.7. Clock Multiplier Electrical Specifications ................................................ 54
Table 6.8. Voltage Regulator Electrical Characteristics .......................................... 54
Table 6.9. ADC0 Electrical Characteristics .............................................................. 55
Table 6.10. Temperature Sensor Electrical Characteristics .................................... 56
Table 6.11. Voltage Reference Electrical Characteristics ....................................... 56
Table 6.12. Comparator 0 and Comparator 1 Electrical Characteristics ................. 57
Table 10.1. CIP-51 Instruction Set Summary .......................................................... 77
Table 12.1. Special Function Register (SFR) Memory Map for 
Table 12.2. Special Function Registers ................................................................. 101
Table 13.1. Interrupt Summary .............................................................................. 107
Table 14.1. Flash Security Summary .................................................................... 120
Table 18.1. Port I/O Assignment for Analog Functions ......................................... 149
Table 18.2. Port I/O Assignment for Digital Functions ........................................... 149
Table 18.3. Port I/O Assignment for External Digital Event Capture Functions .... 150
Table 19.1. Baud Rate Calculation Variable Ranges ............................................ 171
Table 19.2. Manual Baud Rate Parameters Examples ......................................... 173
Table 19.3. Autobaud Parameters Examples ........................................................ 174
Table 19.4. LIN Registers* (Indirectly Addressable) .............................................. 179
Table 20.1. SMBus Clock Source Selection .......................................................... 191
Table 20.2. Minimum SDA Setup and Hold Times ................................................ 192
Table 20.3. Sources for Hardware Changes to SMB0CN ..................................... 196
Table 20.4. SMBus Status Decoding ..................................................................... 202
Table 21.1. Baud Rate Generator Settings for Standard Baud Rates ................... 206
Table 22.1. SPI Slave Timing Parameters ............................................................ 226
Table 24.1. PCA Timebase Input Options ............................................................. 250
Table 24.2. PCA0CPM and PCA0PWM Bit Settings for 
Table 24.3. Watchdog Timer Timeout Intervals1 ................................................... 262
Pages 0x0 and 0xF ............................................................................. 100
PCA Capture/Compare Modules ........................................................ 253
Rev. 1.1
C8051F54x
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