MCF52213CAE50 Freescale Semiconductor, MCF52213CAE50 Datasheet - Page 34
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MCF52213CAE50
Manufacturer Part Number
MCF52213CAE50
Description
IC MCU 32BIT 128K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5221xr
Datasheet
1.MCF52213CAE50.pdf
(56 pages)
Specifications of MCF52213CAE50
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, QSPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
43
Number Of Timers
18
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.4 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Width
10 mm
For Use With
M52210DEMO - BOARD DEV MCF5221X LOW COST
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF52213CAE50
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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2.9
2.10
GPIO can be configured for certain pins of the QSPI, DDR Control, timer, UART, Interrupt and USB interfaces. When in GPIO
mode, the timing specification for these pins is given in
The GPIO timing is met under the following load test conditions:
Freescale Semiconductor
Frequency un-LOCK range
Frequency LOCK range
CLKOUT period jitter
On-chip oscillator frequency
• Peak-to-peak (clock edge to clock edge)
• Long term (averaged over 2 ms interval)
In external clock mode, it is possible to run the chip directly from an external clock source without enabling the PLL.
This value has been updated.
All internal registers retain data at 0 Hz.
Depending on packaging; see the orderable part number summary.
Loss of Reference Frequency is the reference frequency detected internally, which transitions the PLL into self clocked mode.
Self clocked mode frequency is the frequency at which the PLL operates when the reference frequency falls below f
default MFD/RFD settings.
This parameter is characterized before qualification rather than 100% tested.
Proper PC board layout procedures must be followed to achieve specifications.
This specification applies to the period required for the PLL to relock after changing the MFD frequency control bits in the
synthesizer control register (SYNCR).
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the PLL circuitry via V
for a given interval.
Based on slow system clock of 40 MHz measured at f
•
•
Minimum core speed for USB operation
50 pF / 50 for high drive
25 pF / 25 for low drive
USB Operation
General Purpose I/O Timing
4, 5, 10 ,11
Table 28. Oscillator and PLL Electrical Specifications (continued)
Characteristic
, measured at f
Characteristic
DDPLL
(V
DD
Table 29. USB Operation Specifications
MCF52211 ColdFire Microcontroller, Rev. 2
and V
and V
SYS
SSPLL
DDPLL
Max
and variation in crystal oscillator frequency increase the C
= 2.7 to 3.6 V, V
sys
Table 30
max.
and
Figure
SS
Symbol
C
f
f
= V
f
LCK
oco
UL
jitter
f
5.
SSPLL
sys_USB_min
Symbol
= 0 V)
–0.75
–1.5
7.84
Min
—
—
Value
16
Electrical Characteristics
Max
0.75
8.16
1.5
.01
10
MHz
Unit
jitter
percentage
sys
% f
LOR
% f
% f
MHz
Unit
.
sys
ref
ref
with
34