MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 257

IC MCU 64K 8MHZ SPI 48-LQFP

MC908AP64CFAE

Manufacturer Part Number
MC908AP64CFAE
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP64CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
Package
48LQFP
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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ADICLK — ADC Input Clock Select Bit
MODE1 and MODE0 — Modes of Result Justification
15.7.3 ADC Data Register 0 (ADRH0 and ADRL0)
The ADC data register 0 consist of a pair of 8-bit registers: high byte (ADRH0), and low byte (ADRL0).
This pair form a 16-bit register to store the 10-bit ADC result for the selected ADC result justification mode.
In 8-bit truncated mode, the ADRL0 holds the eight most significant bits (MSBs) of the 10-bit result. The
ADRL0 is updated each time an ADC conversion completes. In 8-bit truncated mode, ADRL0 contains no
interlocking with ADRH0. (See
Freescale Semiconductor
ADICLK selects either bus clock or CGMXCLK as the input clock source to generate the internal ADC
clock. Reset selects CGMXCLK as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1MHz, CGMXCLK can be used as the
clock source for the ADC. If CGMXCLK is less than 1MHz, use the PLL-generated bus clock as the
clock source. As long as the internal ADC clock is at f
MODE1 and MODE0 selects between four modes of operation. The manner in which the ADC
conversion results will be placed in the ADC data registers is controlled by these modes of operation.
Reset returns right-justified mode.
1 = Internal bus clock
0 = External clock, CGMXCLK
f
ADIC
X = don’t care
ADIV2
=
0
0
0
0
1
MODE1
0
0
1
1
Figure 15-5 . ADRH0 and ADRL0 in 8-Bit Truncated
CGMXCLK or bus frequency
Table 15-2. ADC Clock Divide Ratio
MC68HC908AP Family Data Sheet, Rev. 4
ADIV1
X
Table 15-3. ADC Mode Select
0
0
1
1
MODE0
ADIV[2:0]
0
1
0
1
ADIV0
X
0
1
0
1
8-bit truncated mode
Right justified mode
Left justified mode
Left justified sign data mode
Justification Mode
ADIC
ADC input clock ÷ 1
ADC input clock ÷ 2
ADC input clock ÷ 4
ADC input clock ÷ 8
ADC input clock ÷ 16
, correct operation can be guaranteed.
ADC Clock Rate
Mode.)
I/O Registers
255

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