MCF52236CAF50 Freescale Semiconductor, MCF52236CAF50 Datasheet - Page 24

• Manufacturer Part Number: MCF52236CAF50
• Description: IC MCU 32BIT 256K FLASH 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF5223xr

Specifications of MCF52236CAF50

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF522x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, QSPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 10
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: M52235EVB, M52233DEMO
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

MCF52235 Family Configurations
1.9
Table 10
1.10
Table 11
1.11
Table 12
24
Transmit Serial Data
Receive Serial Data
DMA Timer Output
Request-to-Send
DMA Timer Input
describes the I
describes the UART module signals.
describes the signals of the four DMA timer modules.
Clear-to-Send
Signal Name
Signal Name
Signal Name
Serial Clock
Serial Data
I
UART Module Signals
DMA Timer Signals
2
Output
Input
C I/O Signals
2
C serial interface module signals.
Abbreviation
Abbreviation
Abbreviation
DTOUTn
URXDn
UTXDn
UCTSn
URTSn
DTINn
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
SDA
SCL
Table 11. UART Module Signals
Open-drain clock signal for the for the I
by the I
clock input when the I
Open-drain signal that serves as the data input/output for the I
interface.
Event input to the DMA timer modules.
Programmable output from the DMA timer modules.
Transmitter serial data outputs for the UART modules. The output is
held high (mark condition) when the transmitter is disabled, idle, or in
the local loopback mode. Data is shifted out, LSB first, on this pin at
the falling edge of the serial clock source.
Receiver serial data inputs for the UART modules. Data is received on
this pin LSB first. When the UART clock is stopped for power-down
mode, any transition on this pin restarts it.
Indicate to the UART modules that they can begin data transmission.
Automatic request-to-send outputs from the UART modules. This
signal can also be configured to be asserted and negated as a
function of the RxFIFO level.
Table 12. DMA Timer Signals
Table 10. I
2
C module when the bus is in master mode or it becomes the
2
C I/O Signals
2
C is in slave mode.
Function
Function
Function
2
C interface. Either it is driven
Freescale Semiconductor
2
C
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I