MCF52236CAF50 Freescale Semiconductor, MCF52236CAF50 Datasheet - Page 35

IC MCU 32BIT 256K FLASH 80-LQFP

MCF52236CAF50

Manufacturer Part Number
MCF52236CAF50
Description
IC MCU 32BIT 256K FLASH 80-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5223xr
Datasheet

Specifications of MCF52236CAF50

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, QSPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
56
Number Of Timers
10
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52235EVB, M52233DEMO
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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7
8
9
10
11
2.5
GPIO can be configured for certain pins of the QSPI, timers, UARTs, FEC, and interrupts. When in GPIO mode, the timing
specification for these pins is given in
The GPIO timing is met under the following load test conditions:
Freescale Semiconductor
This value has been updated
Load capacitance determined from crystal manufacturer specifications and include circuit board parasitics.
Assuming a reference is available at power up, lock time is measured from the time V
negating. If the crystal oscillator is the reference for the PLL, the crystal start up time must be added to the PLL lock time to
determine the total start-up time.
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the PLL circuitry via V
for a given interval
Based on slow system clock of 40 MHz measured at f
Num
G1
G2
G3
G4
50 pF / 50  for high drive
25 pF / 25  for low drive
General Purpose I/O Timing
CLKOUT high to GPIO output invalid
CLKOUT high to GPIO input invalid
CLKOUT high to GPIO output valid
GPIO input valid to CLKOUT high
GPIO Outputs
GPIO Inputs
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
Characteristic
CLKOUT
DDPLL
Table 26
and V
and
SSPLL
Table 26. GPIO Timing
Figure 6. GPIO Timing
G3
Figure
and variation in crystal oscillator frequency increase the C
sys
max.
6.
G1
G4
Symbol
t
t
CHPOV
t
CHPOI
t
PVCH
CHPI
G2
DD
and V
Min
1.5
1.5
9
DDPLL
Electrical Characteristics
are valid to RSTO
Max
10
jitter
percentage
sys
.
Unit
ns
ns
ns
ns
35

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