M30260F3AGP#U3A Renesas Electronics America, M30260F3AGP#U3A Datasheet - Page 95

• Manufacturer Part Number: M30260F3AGP#U3A
• Description: IC M16C/26A MCU FLASH 24K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F3AGP#U3A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Interface Type: UART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
9.6 INT Interrupt
1
. v
J
Figure 9.6.1. IFSR Register
6
0
_______
2
C
INTi interrupt (i=0 to 5) is triggered by the edges of external inputs. The edge polarity is selected using the
IFSRi bit in the IFSR register.
To use the INT4 interrupt, set the IFSR6 bit in the IFSR register to "1" (=INT4). To use the INT5 interrupt, set
the IFSR7 bit in the IFSR register to "1" (=INT5).
After modifiying the IFSR6 or IFSR7 bit, clear the corresponding IR bit to "0" (=interrupt not requested)
before enabling the interrupt.
The INT5 input has an effective digital debounce function for a noize rejection. Refer to 16.6 Digital
Debounce function for this detail. When using INT5 interrupt to exit stop mode, set the P17DDR register
to "FF
Figure 9.6.1 shows the IFSR register.
9
0 .
______
B
2 /
0
0
6
2
A
________
0
F
2
16
e
G
0 -
b
Interrupt request cause select register
" before entering stop mode.
o r
1 .
b7
2
NOTE:
0
, 5
u
________
0
b6
p
1. When setting this bit to “1” (= both edges), make sure the POL bit in the INT0IC to INT5IC register is set to
2
0
(
“0” (= falling edge).
b5
M
0
7
1
b4
6
C
b3
page 76
2 /
b2
6
, A
b1
M
b0
1
f o
6
C
3
Bit symbol
2
IFSR0
IFSR1
IFSR2
IFSR3
IFSR4
IFSR5
IFSR6
IFSR7
2 /
9
6
, B
Symbol
IFSR
M
1
INT0 interrupt polarity
switching bit
INT1 interrupt polarity
switching bit
INT2 interrupt polarity
switching bit
INT3 interrupt polarity
switching bit
INT4 interrupt polarity
switching bit
INT5 interrupt polarity
switching bit
Interrupt request cause
select bit
Interrupt request cause
select bit
6
________
C
2 /
6
) T
________
Bit name
Address
035F
16
After reset
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : Reserved
1 : INT4
0 : Reserved
1 : INT5
00
________
16
Function
(1)
(1)
(1)
(1)
(1)
(1)
________
RW
RW
RW
RW
RW
RW
RW
RW
RW
9. Interrupt