HD64F38024RHV Renesas Electronics America, HD64F38024RHV Datasheet - Page 139
HD64F38024RHV
Manufacturer Part Number
HD64F38024RHV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets
1.US38024-BAG1.pdf
(684 pages)
2.DF36012GFYV.pdf
(1021 pages)
3.DF38102HV.pdf
(145 pages)
Specifications of HD64F38024RHV
Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK38076 - DEV EVAL KIT FOR H8/38076
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F38024RHV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F38024RHV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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1. Oscillation stabilization time (t
The time from the point at which the system clock oscillator oscillation waveform starts to change
when an interrupt is generated, until the amplitude of the oscillation waveform increases and the
oscillation frequency stabilizes.
2. Wait time
The time required for the CPU and peripheral functions to begin operating after the oscillation
waveform frequency and system clock have stabilized.
The wait time setting is selected with standby timer select bits 2 to 0 (STS2 to STS0) (bits 6 to 4 in
system control register 1 (SYSCR1)).
When standby mode, watch mode, or subactive mode is cleared by an interrupt or reset, and a
transition is made to active (high-speed/medium-speed) mode, the oscillation waveform begins to
change at the point at which the interrupt is accepted. Therefore, when an oscillator element is
connected in standby mode, watch mode, or subactive mode, since the system clock oscillator is
halted, the time from the point at which this oscillation waveform starts to change until the
Operating
mode
Oscillation
waveform
(OSC2)
System clock
(φ)
Oscillation
stabilization
time
Standby mode,
watch mode,
or subactive
mode
Figure 4.14 Oscillation Stabilization Wait Time
Interrupt accepted
Oscillation stabilization wait time
rc
)
Wait time
Rev. 8.00 Mar. 09, 2010 Page 117 of 658
Section 4 Clock Pulse Generators
Active (high-speed) mode or
active (medium-speed) mode
REJ09B0042-0800
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