C8051F005-GQ Silicon Laboratories Inc, C8051F005-GQ Datasheet - Page 86

IC 8051 MCU 32K FLASH 64TQFP

C8051F005-GQ

Manufacturer Part Number
C8051F005-GQ
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F00xr
Datasheets

Specifications of C8051F005-GQ

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
32
Ram Memory Size
2304Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
5
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1188 - DEV KIT FOR F005/006/007
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1187

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0
If enabled, the Missing Clock Detector will cause an internal reset and thereby terminate the Stop mode. The
Missing Clock Detector should be disabled if the CPU is to be put to sleep for longer than the MCD timeout of
100sec.
Bit7:
Bits6-2: GF4-GF0: General Purpose Flags 4-0.
Bit1:
Bit0:
SMOD
R/W
Bit7
SMOD: Serial Port Baud Rate Doubler Enable.
0: Serial Port baud rate is that defined by Serial Port Mode in SCON.
1: Serial Port baud rate is double that defined by Serial Port Mode in SCON.
These are general purpose flags for use under software control.
Setting this bit will place the CIP-51 in Stop mode. This bit will always be read as 0.
1: Goes into power down mode. (Turns off internal oscillator).
Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.
1: Goes into idle mode. (Shuts off clock to CPU, but clock to Timers, Interrupts, Serial
STOP: Stop Mode Select.
IDLE: Idle Mode Select.
Ports, and Analog Peripherals are still active.)
GF4
R/W
Bit6
Figure 10.15. PCON: Power Control Register
R/W
GF3
Bit5
R/W
GF2
Bit4
Rev. 1.7
GF1
R/W
Bit3
R/W
GF0
Bit2
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
STOP
R/W
Bit1
IDLE
R/W
Bit0
SFR Address:
Reset Value
00000000
0x87
86

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