MC56F8145VFGE Freescale Semiconductor, MC56F8145VFGE Datasheet - Page 134

• Manufacturer Part Number: MC56F8145VFGE
• Description: IC DSP 16BIT 40MHZ 128-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8145VFGE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 128-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 x 12 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1. Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application. Determined on 2s2p ther-
2. Junction to ambient thermal resistance, Theta-JA (R
3. Junction to case thermal resistance, Theta-JC (R
4. Thermal Characterization Parameter, Psi-JT (Ψ
5. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
6. See
134
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to case
Junction to center of case
I/O pin power dissipation
Power dissipation
Maximum allowed P
mal test board.
in a horizontal configuration in natural convection. Theta-JA was also simulated on a thermal test board with two internal planes
(2s2p, where “s” is the number of signal layers and “p” is the number of planes) per JESD51-6 and JESD51-7. The correct name
for Theta-JA for forced convection or with the non-single layer boards is Theta-JMA.
plate technique with the cold plate temperature used as the "case" temperature. The basic cold plate measurement technique is
described by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when
the package is being used with a heat sink.
ter of case as defined in JESD51-2. Ψ
vironments.
ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
Part 12.1
ESD for Human Body Model (HBM)
ESD for Machine Model (MM)
ESD for Charge Device Model (CDM)
Characteristic
Table 10-2 56F8345/56F8145 ElectroStatic Discharge (ESD) Protection
for more details on thermal design considerations.
D
Characteristic
Table 10-3 Thermal Characteristics
Four layer board (2s2p)
Four layer board (2s2p)
JT
is a useful value to use to estimate junction temperature in steady-state customer en-
Comments
56F8345 Technical Data, Rev. 17
JT
), is the "resistance" from junction to reference point thermocouple on top cen-
θJC
θJA
), was simulated to be equivalent to the measured values using the cold
) was simulated to be equivalent to the JEDEC specification JESD51-2
2000
Min
200
500
Symbol
P
R
R
(2s2p)
R
R
R
P
Ψ
DMAX
P
θJMA
θJMA
θJMA
θJC
θJA
I/O
JT
D
Typ
—
—
—
P
D
(TJ - TA) / R
User-determined
= (I
128-pin LQFP
6
DD
Value
50.8
46.5
43.9
41.7
13.9
1.2
x V
Max
—
—
—
DD
θ
+ P
JA
7
Freescale Semiconductor
I/O
)
Unit
V
V
V
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
W
W
W
Preliminary
Notes
4, 5
1,2
1,2
2
2
3