C8051F061-GQ Silicon Laboratories Inc, C8051F061-GQ Datasheet - Page 319
C8051F061-GQ
Manufacturer Part Number
C8051F061-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Specifications of C8051F061-GQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F060DK
Minimum Operating Temperature
- 40 C
On-chip Adc
2-ch x 16-bit
On-chip Dac
2-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1215
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F061-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F061-GQR
Manufacturer:
SILICON
Quantity:
2 100
Company:
Part Number:
C8051F061-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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EXTEST provides access to both capture and update actions, while Sample only performs a capture.
102, 104, 106, 108
103, 105, 107, 109
110, 112, 114, 116,
118, 120, 122, 124
111, 113, 115, 117,
119, 121, 123, 125
79, 81, 83, 85, 87,
94, 96, 98, 100,
95, 97, 99, 101,
89, 91, 93
Bit
Table 26.1. Boundary Data Register Bit Definitions (C8051F060/2/4/6) (Continued)
Action
Capture P5.n input from pin (follows P0.n numbering scheme)
Update
Capture P6.n output enable from MCU (follows P0.n numbering scheme)
Update
Capture P6.n input from pin (follows P0.n numbering scheme)
Update
Capture P7.n output enable from MCU (follows P0.n numbering scheme)
Update
Capture P7.n input from pin (follows P0.n numbering scheme)
Update
Target
P5.n output to pin (follows P0.n numbering scheme)
P6.n output enable to pin (follows P0.n numbering scheme)
P6.n output to pin (follows P0.n numbering scheme)
P7.n output enable to pin (follows P0.n numbering scheme)
P7.n output to pin (follows P0.n numbering scheme)
Rev. 1.2
C8051F060/1/2/3/4/5/6/7
319
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