MC9S12DB128CPVE Freescale Semiconductor, MC9S12DB128CPVE Datasheet - Page 2

• Manufacturer Part Number: MC9S12DB128CPVE
• Description: IC MCU 128K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12DB128CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 91
• Eeprom Memory Size: 2048Byte
• Ram Memory Size: 8192Byte
• Cpu Speed: 25MHz
• Rohs Compliant: Yes
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 91
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 2(8-chx10-bit)
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device User Guide — 9S12DT128DGV2/D V02.15
Revision History
Number
Version
V01.00
V01.01
V01.02
V01.03
V01.04
V01.05
V01.06
V02.00
V02.01
2
Revision
23 July
23 Sep
18 Jun
27 Feb
11 Jan
01 Feb
12 Oct
8 July
4 Mar
Date
2001
2001
2001
2001
2002
2002
2002
2002
2002
Effective
18 June
23 Sep
23 July
27 Feb
22 July
01 Feb
12 Oct
11 Jan
4 Mar
Date
2001
2001
2001
2001
2002
2002
2002
2002
2002
Author
Initial version (parent doc v2.03 dug for dp256).
Updated version after review
Changed Partname, added pierce mode, updated electrical
characteristics
some minor corrections
Replaced Star12 by HCS12
Updated electrical spec after MC-Qualification (IOL/IOH), Data for
Pierce, NVM reliability
New document numbering. Corrected Typos
Increased VDD to 2.35V, removed min. oscillator startup
Removed Document order number except from Cover Sheet
Added:
Pull-up columns to signal table,
example for PLL Filter calculation,
Thermal values for junction to board and package,
BGND pin pull-up
Part Order Information
Global Register Table
Chip Configuration Summary
Modified:
Reduced Wait and Run IDD values
Mode of Operation chapter
changed leakage current for ADC inputs down to +-1uA
Corrected:
Interrupt vector table enable register inconsistencies
PCB layout for 80QFP VREGEN position
NEW MASKSET
Changed part number from DTB128 to DT128
Functional Changes:
ROMCTL changes in Emulation Mode
80 Pin Byteflight package Option available
Flash with 2 Bit Backdoor Key Enable
Additional CAN0 routing to PJ7,6
Improved BDM with sync and acknowledge capabilities
New Part ID number
Improvements:
Significantly improved NVM reliability data
Corrections:
Interrupt vector Table
Updated Block User Guide versions in preface
Updated Appendix A Electrical Characteristics
Description of Changes
Freescale Semiconductor