M30626FHPGP#U3C Renesas Electronics America, M30626FHPGP#U3C Datasheet - Page 123
![IC M16C MCU FLASH 384K 100LQFP](/photos/12/21/122189/m30626fhpgp_u3c_sml.jpg)
M30626FHPGP#U3C
Manufacturer Part Number
M30626FHPGP#U3C
Description
IC M16C MCU FLASH 384K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30626FHPGP#U3C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
12. Interrupt
12.1
Figure 12.1
Figure 12.1 shows Type of Interrupts.
Interrupt
NOTES:
•
•
Maskable Interrupt
Non-Maskable Interrupt : An interrupt which cannot be enabled (disabled) by the interrupt enable flag (I flag)
Note
The M16C/62P (80-pin version) do not use INT3 to INT5 interrupt of peripheral function.
The M16C/62PT (100-pin version) do not use low voltage detection interrupt.
The M16C/62PT (80-pin version) do not use low voltage detection interrupt and INT3 to INT5 interrupt of peripheral
function.
1. The peripheral functions in the microcomputer are used to generate the peripheral interrupt.
2. Do not normally use this interrupt because it is provided exclusively for use by development tools.
Type of Interrupts
Jan 10, 2006
Type of Interrupts
Software
(Non-maskable interrupt)
Hardware
Page 106 of 390
: An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or
whose interrupt priority can be changed by priority level.
or whose interrupt priority cannot be changed by priority level.
Special
(Non-maskable interrupt)
Peripheral function
(Maskable interrupt)
(1)
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
NMI
DBC
Watchdog timer
Oscillation stop and re-oscillation
detection
Low voltage detection
Single step
Address match
(2)
(2)
12. Interrupt
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